this repo has no description
anil.recoil.org
1opam-version: "2.0"
2maintainer: "Jane Street developers"
3authors: ["Jane Street Group, LLC"]
4homepage: "https://github.com/janestreet/hardcaml_of_verilog"
5bug-reports: "https://github.com/janestreet/hardcaml_of_verilog/issues"
6dev-repo: "git+https://github.com/janestreet/hardcaml_of_verilog.git"
7doc: "https://ocaml.janestreet.com/ocaml-core/latest/doc/hardcaml_of_verilog/index.html"
8license: "MIT"
9build: [
10 ["dune" "build" "-p" name "-j" jobs]
11]
12depends: [
13 "ocaml" {>= "4.14.0"}
14 "base" {>= "v0.16" & < "v0.17"}
15 "core" {>= "v0.16" & < "v0.17"}
16 "core_unix" {>= "v0.16" & < "v0.17"}
17 "hardcaml" {>= "v0.16" & < "v0.17"}
18 "hardcaml_verify" {>= "v0.16" & < "v0.17"}
19 "jsonaf" {>= "v0.16" & < "v0.17"}
20 "ppx_deriving_hardcaml" {>= "v0.16" & < "v0.17"}
21 "ppx_jane" {>= "v0.16" & < "v0.17"}
22 "ppx_jsonaf_conv" {>= "v0.16" & < "v0.17"}
23 "stdio" {>= "v0.16" & < "v0.17"}
24 "dune" {>= "2.0.0"}
25]
26synopsis: "Convert Verilog to a Hardcaml design"
27description: "
28The opensource synthesis tool yosys is used to convert a verilog design to a JSON based
29netlist representation. This library can load the JSON netlist and build a hardcaml
30circuit.
31
32Code can also be generated to wrap the conversion process using Hardcaml interfaces.
33"
34url {
35src: "https://ocaml.janestreet.com/ocaml-core/v0.16/files/hardcaml_of_verilog-v0.16.0.tar.gz"
36checksum: "sha256=d0c73140e80b48f7e971d6fa94e7f8ed8aa64cd7685d0fb442eb590ba6a244b4"
37}