Microkernel thing OS experiment (Zig ⚡)
pci.express
1pub fn out(comptime T: type, port: u16, value: T) void {
2 switch (T) {
3 u8 => outb(port, value),
4 u16 => outw(port, value),
5 u32 => outl(port, value),
6 else => @compileError("Bad I/O port out size!"),
7 }
8}
9
10pub fn in(comptime T: type, port: u16) T {
11 return switch (T) {
12 u8 => inb(port),
13 u16 => inw(port),
14 u32 => inl(port),
15 else => @compileError("Bad I/O port in size!"),
16 };
17}
18
19pub fn outb(port: u16, val: u8) void {
20 asm volatile ("outb %[val], %[port]"
21 :
22 : [val] "{al}" (val),
23 [port] "N{dx}" (port),
24 );
25}
26
27pub fn outw(port: u16, val: u16) void {
28 asm volatile ("outw %[val], %[port]"
29 :
30 : [val] "{ax}" (val),
31 [port] "N{dx}" (port),
32 );
33}
34
35pub fn outl(port: u16, val: u32) void {
36 asm volatile ("outl %[val], %[port]"
37 :
38 : [val] "{eax}" (val),
39 [port] "N{dx}" (port),
40 );
41}
42
43pub fn inb(port: u16) u8 {
44 return asm volatile ("inb %[port], %[result]"
45 : [result] "={al}" (-> u8),
46 : [port] "N{dx}" (port),
47 );
48}
49
50fn inw(port: u16) u16 {
51 return asm volatile ("inw %[port], %[result]"
52 : [result] "={ax}" (-> u16),
53 : [port] "N{dx}" (port),
54 );
55}
56
57pub fn inl(port: u16) u32 {
58 return asm volatile ("inl %[port], %[result]"
59 : [result] "={eax}" (-> u32),
60 : [port] "N{dx}" (port),
61 );
62}