Microkernel thing OS experiment (Zig ⚡)

fix isr dpl

pci.express e02057b7 62ca8c30

verified
Changed files
+12 -12
components
ukernel
+3 -4
build.zig.zon
···
.path = "components/build_helpers",
},
.limine_binary = .{
-
.url = "git+https://codeberg.org/Limine/Limine?ref=v9.x-binary#acf1e35c4685dba7ef271013db375a727c340ff7",
-
.hash = "N-V-__8AAOkzSACT_9p6kmSSly1l008erzXuG39Z6r54B_y0",
-
// Codeberg is always down so better to leave it not lazy
-
// .lazy = true,
+
.url = "git+https://codeberg.org/Limine/Limine?ref=v10.x-binary#648e33afd153bdbf780ba123e45997428796395d",
+
.hash = "N-V-__8AAJ8bSADxAGaebgaAbkAR2kqOBy52rXAL0oCumn0t",
+
.lazy = true,
},
.edk2_binary = .{
.url = "git+https://github.com/retrage/edk2-nightly#23068f498687bf64f2b8f80fbcf11e82d987fd9b",
+2 -2
components/ukernel/arch/amd64/interrupts/apic.zig
···
// .priority_class = 0,
// .priority_sub_class = 0,
// });
-
arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, u64, spurious_interrupt_handler, 3, 0);
-
arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, u64, timer_handler, 3, 0);
+
arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, u64, spurious_interrupt_handler, 0, 0);
+
arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, u64, timer_handler, 0, 0);
// Calibrate against the TSC
calibrateTimer();
+1 -1
components/ukernel/arch/amd64/interrupts/idt.zig
···
// Set every IDT entry to the corresponding ActualHandler
for (0..entry_count) |i| {
const actual_handler = @intFromPtr(actual_handlers[i]);
-
interrupt_descriptor_table[i] = Entry.init(actual_handler, 3, 0);
+
interrupt_descriptor_table[i] = Entry.init(actual_handler, 0, 0);
}
// Now, set every defined handler to the default one
@memset(&defined_handlers, arch.interrupts.unhandled_interrupt);
+1 -1
components/ukernel/arch/amd64/interrupts/pic.zig
···
wait();
// Set up a spurious IRQ7 handler
-
arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, u64, spurious_handler, 3, 0);
+
arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, u64, spurious_handler, 0, 0);
}
inline fn wait() void {
+4 -3
components/ukernel/arch/amd64/interrupts/root.zig
···
}
pub fn general_protection_fault(stack_frame: *idt.InterruptFrame(idt.SelectorErrorCode)) callconv(idt.CallConv) void {
+
arch.interrupts.disable();
std.log.warn("General Protection Fault @ 0x{x}", .{stack_frame.rip});
const target = stack_frame.error_code.parse();
···
// Set up the IDT and associated vectors
idt.init();
idt.add_handler(.{ .exception = .breakpoint }, u64, arch.interrupts.breakpoint, 3, 0);
-
idt.add_handler(.{ .exception = .double_fault }, u64, arch.interrupts.double_fault, 3, 0);
-
idt.add_handler(.{ .exception = .general_protection_fault }, idt.SelectorErrorCode, arch.interrupts.general_protection_fault, 3, 0);
-
idt.add_handler(.{ .exception = .page_fault }, u64, arch.mm.paging.page_fault_handler, 3, 0);
+
idt.add_handler(.{ .exception = .double_fault }, u64, arch.interrupts.double_fault, 0, 0);
+
idt.add_handler(.{ .exception = .general_protection_fault }, idt.SelectorErrorCode, arch.interrupts.general_protection_fault, 0, 0);
+
idt.add_handler(.{ .exception = .page_fault }, u64, arch.mm.paging.page_fault_handler, 0, 0);
// Set up the 8254's (we need 8259 timer to calibrate tsc)
pic.init();
// Calibrate the TSC against the 8259
+1 -1
components/ukernel/build.zig.zon
···
.build_helpers = .{ .path = "../build_helpers" },
.console = .{ .path = "deps/console" },
.Queue = .{
-
.url = "git+https://tangled.sh/@sydney.blue/Queue.zig?ref=dev#6c0760e8a233c1d59554a40a87f0ef293a9697f3",
+
.url = "git+https://tangled.org/@sydney.blue/Queue.zig?ref=dev#6c0760e8a233c1d59554a40a87f0ef293a9697f3",
.hash = "Queue-0.0.0-upnEfhEPAADNV4Dvs3DVCRSnOh-BrhgsRR6scaE2qTIa",
},
},