commit f49cd5919817b02d13a40d6104a937753da59922 · pci.express/frostium

+46 -184

components/ukernel/arch/amd64/boot.zig

···

       7
       7
        
       const StandardGdt = arch.structures.gdt.StandardGdt;

     

       8
       8
        
       const Tss = arch.structures.tss.Tss;

     

       9
       9
        
       

     

       10
       10
       -
       var pg_ctx: arch.mm.paging.Context = undefined;

     

       11
       11
       -
       

     

       12
       10
        
       pub const limine_requests = struct {

     

       13
       11
        
           export var start_marker: limine.RequestsStartMarker linksection(".limine_reqs_start") = .{};

     

       14
       12
        
           export var end_marker: limine.RequestsEndMarker linksection(".limine_reqs_end") = .{};

     
···

       23
       21
        
           pub export var mp: limine.SmpMpFeature.MpRequest linksection(".limine_reqs") = .{ .flags = .{ .x2apic = true } };

     

       24
       22
        
       };

     

       25
       23
        
       

     

       26
       26
       -
       pub fn bsp_init() callconv(.c) noreturn {

     

       24
       24
       +
       pub fn early_init() void {

     

       27
       25
        
           // Don't optimize away the limine requests

     

       28
       26
        
           inline for (@typeInfo(limine_requests).@"struct".decls) |decl| {

     

       29
       27
        
               std.mem.doNotOptimizeAway(&@field(limine_requests, decl.name));

     
···

       35
       33
        
               arch.instructions.die();

     

       36
       34
        
           }

     

       37
       35
        
       

     

       36
       36
       +
           // If the base revision isn't supported, we can't boot

     

       37
       37
       +
           if (!limine_requests.base_revision.isSupported()) {

     

       38
       38
       +
               @branchHint(.cold);

     

       39
       39
       +
               arch.instructions.die();

     

       40
       40
       +
           }

     

       41
       41
       +
       

     

       38
       42
        
           // Die if we don't have a memory map or Higher Half Direct Mapping

     

       39
       43
        
           if (limine_requests.memmap.response == null) {

     

       40
       44
        
               @branchHint(.cold);

     
···

       48
       52
        
           const hhdm_offset = limine_requests.hhdm.response.?.offset;

     

       49
       53
        
           common.init_data.hhdm_slide = hhdm_offset;

     

       50
       54
        
       

     

       51
       51
       -
           // Set up the temporary Physical Memory Allocator

     

       52
       52
       -
           common.mm.bootmem.init();

     

       53
       53
       -
       

     

       54
       54
       -
           // Add in a framebuffer if found

     

       55
       55
       -
           initConsole();

     

       56
       56
       -
       

     

       57
       57
       -
           // Get basic information through CPUID

     

       55
       55
       +
           // Get CPUID info

     

       58
       56
        
           arch.instructions.cpuid.init();

     

       59
       57
        
       

     

       60
       60
       -
           // Add in ACPI/dtb if found, prefer ACPI

     

       61
       61
       -
           initHwDesc();

     

       62
       62
       -
       

     

       63
       63
       -
           // Attach the root task

     

       64
       64
       -
           if (limine_requests.modules.response) |module_response| {

     

       65
       65
       -
               if (module_response.module_count > 0) {

     

       66
       66
       -
                   const mod = module_response.modules.?[0];

     

       67
       67
       -
                   const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       68
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       -
                   const mod_size = mod.size;

     

       69
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       -
                   log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       70
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       -
                   common.init_data.root_task = mod_addr[0..mod_size];

     

       71
       71
       -
               }

     

       72
       72
       -
           } else {

     

       73
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       -
               @branchHint(.unlikely);

     

       74
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       -
               @panic("No root task found!");

     

       75
       75
       -
           }

     

       58
       58
       +
           // Set up the kernel paging context

     

       59
       59
       +
           common.init_data.kernel_paging_ctx = arch.mm.paging.Context.get_current();

     

       60
       60
       +
       }

     

       76
       61
        
       

     

       77
       77
       -
           // Initialize per-cpu data (GDT and TSS)

     

       62
       62
       +
       pub fn bsp_init() void {

     

       63
       63
       +
           // Set up per-cpu data

     

       78
       64
        
           arch.per_cpu_init_data.init(limine_requests.mp.response.?.cpu_count);

     

       79
       79
       -
       

     

       80
       80
       -
           // Install the IDT

     

       81
       81
       -
           arch.interrupts.idt.init();

     

       82
       65
        
       

     

       83
       66
        
           // Set up our own GDT and TSS

     

       84
       67
        
           const gdt = &arch.per_cpu_init_data.gdt_buf[0];

     
···

       93
       76
        
       

     

       94
       77
        
           gdt.tss_desc.set_tss_addr(tss);

     

       95
       78
        
           gdt.load();

     

       96
       96
       -
           log.info("BSP successfully setup GDT+TSS!", .{});

     

       97
       97
       -
       

     

       98
       98
       -
           // AP bootstrap

     

       99
       99
       -
           bootstrapAPs();

     

       100
       100
       -
       

     

       101
       101
       -
           // Calibrate our TSC

     

       102
       102
       -
           arch.tsc.calibrate_pit() catch {

     

       103
       103
       -
               log.info("Failed to calibrate with PIT!", .{});

     

       104
       104
       -
               arch.instructions.die();

     

       105
       105
       -
           };

     

       106
       106
       -
           log.info("TSC estimate: {} MHz", .{arch.tsc.tsc_khz / 1000});

     

       107
       107
       -
       

     

       108
       108
       -
           log.info("Setting up scheduling...", .{});

     

       109
       109
       -
       

     

       110
       110
       -
           pg_ctx = arch.mm.paging.Context.get_current();

     

       111
       79
        
       

     

       112
       112
       -
           initApic() catch |err| {

     

       113
       113
       -
               log.err("Failed to set up APIC! {}", .{err});

     

       114
       114
       -
               @panic("apic");

     

       115
       115
       -
           };

     

       116
       116
       -
       

     

       117
       117
       -
           log.info("Allocating code for userspace...", .{});

     

       118
       118
       -
       

     

       119
       119
       -
           // Allocate a stack (0x3000 - 0x4000)

     

       120
       120
       -
           common.mm.paging.map(.{

     

       121
       121
       -
               .vaddr = 0x7ffe_0000_0000,

     

       122
       122
       -
               .size = 65536,

     

       123
       123
       -
               .memory_type = .MemoryWriteBack,

     

       124
       124
       -
               .perms = .{

     

       125
       125
       -
                   .x = false,

     

       126
       126
       -
                   .u = true,

     

       127
       127
       -
                   .w = true,

     

       128
       128
       -
               },

     

       129
       129
       -
               .context = &pg_ctx,

     

       130
       130
       -
           }) catch @panic("couldn't map user stack");

     

       131
       131
       -
       

     

       132
       132
       -
           const entry = common.loadRootTask(&pg_ctx) catch |err| {

     

       133
       133
       -
               log.err("Couldn't load the root task! {}", .{err});

     

       134
       134
       -
               @panic("ggz");

     

       135
       135
       -
           };

     

       136
       136
       -
           log.info("Dropping to userspace entry 0x{x:0>16}", .{entry});

     

       137
       137
       -
       

     

       138
       138
       -
           init_syscalls();

     

       139
       139
       -
       

     

       140
       140
       -
           arch.interrupts.apic.armTimer(1000);

     

       141
       141
       -
           enter_userspace(entry, 0x69, 0x7ffe_0001_0000);

     

       142
       142
       -
       }

     

       143
       143
       -
       

     

       144
       144
       -
       // Get ready for system calls (set MSRs)

     

       145
       145
       -
       fn init_syscalls() void {

     

       146
       146
       -
           // Set up the STAR MSR with the segment descriptors

     

       147
       147
       -
           const IA32_STAR = arch.registers.MSR(u64, 0xC0000081);

     

       148
       148
       -
           const star_value: u64 = 0 | @as(u64, arch.structures.gdt.StandardGdt.selectors.kernel_code) << 32 | (@as(u64, arch.structures.gdt.StandardGdt.selectors.tss_desc + 8) | 3) << 48;

     

       149
       149
       -
           IA32_STAR.write(star_value);

     

       150
       150
       -
       

     

       151
       151
       -
           // Set up the EFER MSR with SCE (System Call Enable)

     

       152
       152
       -
           const IA32_EFER = arch.registers.MSR(u64, 0xC0000080);

     

       153
       153
       -
           const efer_val = IA32_EFER.read() | 0b1;

     

       154
       154
       -
           IA32_EFER.write(efer_val);

     

       155
       155
       -
       

     

       156
       156
       -
           // Set up LSTAR with the syscall handler and FMASK to clear interrupts

     

       157
       157
       -
           const IA32_LSTAR = arch.registers.MSR(u64, 0xC0000082);

     

       158
       158
       -
           IA32_LSTAR.write(@intFromPtr(syscall_entry));

     

       159
       159
       -
       

     

       160
       160
       -
           const IA32_FMASK = arch.registers.MSR(u64, 0xC0000084);

     

       161
       161
       -
           IA32_FMASK.write(1 << 9);

     

       162
       162
       -
       }

     

       163
       163
       -
       

     

       164
       164
       -
       const syscall_entry = @extern(*anyopaque, .{

     

       165
       165
       -
           .name = "syscall_entry",

     

       166
       166
       -
       });

     

       167
       167
       -
       export fn syscall_handler(rdi: usize, rsi: usize) callconv(.c) void {

     

       168
       168
       -
           std.log.info("Got a syscall! rdi=0x{x}, rsi=0x{x}", .{ rdi, rsi });

     

       169
       169
       -
       }

     

       170
       170
       -
       

     

       171
       171
       -
       fn enter_userspace(entry: u64, arg: u64, stack: u64) noreturn {

     

       172
       172
       -
           log.info("usercode64 GDT 0x{x}, userdata64 GDT 0x{x}", .{ arch.structures.gdt.StandardGdt.selectors.user_code, arch.structures.gdt.StandardGdt.selectors.user_data });

     

       173
       173
       -
           const cr3 = arch.registers.ControlRegisters.Cr3.read();

     

       174
       174
       -
           arch.registers.ControlRegisters.Cr3.write(cr3);

     

       175
       175
       -
           asm volatile (

     

       176
       176
       -
               \\ push %[userdata64]

     

       177
       177
       -
               \\ push %[stack]

     

       178
       178
       -
               \\ push $0x202

     

       179
       179
       -
               \\ push %[usercode64]

     

       180
       180
       -
               \\ push %[entry]

     

       181
       181
       -
               \\

     

       182
       182
       -
               \\ mov %[userdata64], %%rax

     

       183
       183
       -
               \\ mov %%rax, %%es

     

       184
       184
       -
               \\ mov %%rax, %%ds

     

       185
       185
       -
               \\

     

       186
       186
       -
               \\ xor %%rsi, %%rsi

     

       187
       187
       -
               \\ xor %%rax, %%rax

     

       188
       188
       -
               \\ xor %%rdx, %%rdx

     

       189
       189
       -
               \\ xor %%rcx, %%rcx

     

       190
       190
       -
               \\ xor %%rbp, %%rbp

     

       191
       191
       -
               \\ xor %%rbx, %%rbx

     

       192
       192
       -
               \\

     

       193
       193
       -
               \\ xor %%r8, %%r8

     

       194
       194
       -
               \\ xor %%r9, %%r9

     

       195
       195
       -
               \\ xor %%r10, %%r10

     

       196
       196
       -
               \\ xor %%r11, %%r11

     

       197
       197
       -
               \\ xor %%r12, %%r12

     

       198
       198
       -
               \\ xor %%r13, %%r13

     

       199
       199
       -
               \\ xor %%r14, %%r14

     

       200
       200
       -
               \\ xor %%r15, %%r15

     

       201
       201
       -
               \\

     

       202
       202
       -
               \\ iretq

     

       203
       203
       -
               \\

     

       204
       204
       -
               :

     

       205
       205
       -
               : [arg] "{rdi}" (arg),

     

       206
       206
       -
                 [stack] "r" (stack),

     

       207
       207
       -
                 [entry] "r" (entry),

     

       208
       208
       -
                 [userdata64] "i" (arch.structures.gdt.StandardGdt.selectors.user_data),

     

       209
       209
       -
                 [usercode64] "i" (arch.structures.gdt.StandardGdt.selectors.user_code),

     

       210
       210
       -
           );

     

       211
       211
       -
           unreachable;

     

       212
       212
       -
       }

     

       213
       213
       -
       

     

       214
       214
       -
       fn initApic() !void {

     

       215
       215
       -
           const has_x2apic = limine_requests.mp.response.?.flags.x2apic;

     

       216
       216
       -
           arch.interrupts.apic.singleton = switch (has_x2apic) {

     

       217
       217
       -
               true => .x2apic,

     

       218
       218
       -
               false => blk: {

     

       219
       219
       -
                   // Map the APIC first!

     

       220
       220
       -
                   const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       221
       221
       -
                   try common.mm.paging.mapPhys(.{

     

       222
       222
       -
                       .vaddr = @intFromPtr(apic_base),

     

       223
       223
       -
                       .paddr = 0xFEE0_0000,

     

       224
       224
       -
                       .size = 0x1000,

     

       225
       225
       -
                       .memory_type = .DeviceUncacheable,

     

       226
       226
       -
                       .perms = .{

     

       227
       227
       -
                           .x = false,

     

       228
       228
       -
                           .u = false,

     

       229
       229
       -
                           .w = true,

     

       230
       230
       -
                       },

     

       231
       231
       -
                       .context = &pg_ctx,

     

       232
       232
       -
                   });

     

       233
       233
       -
                   break :blk .{ .xapic = apic_base };

     

       234
       234
       -
               },

     

       235
       235
       -
           };

     

       236
       236
       -
           // Set up the spurious vector, TPR, and

     

       237
       237
       -
           // calibrate the timer

     

       238
       238
       -
           arch.interrupts.apic.init.initialSetup();

     

       239
       239
       -
       

     

       240
       240
       -
           // Enable one-shot interrupts

     

       241
       241
       -
           arch.interrupts.apic.init.enableOneshotInterrupt();

     

       242
       242
       -
       }

     

       243
       243
       -
       

     

       244
       244
       -
       fn initConsole() void {

     

       80
       80
       +
           // Add in the framebuffer

     

       245
       81
        
           if (limine_requests.framebuffer.response) |fb_response| {

     

       246
       82
        
               if (fb_response.framebuffer_count > 0) {

     

       247
       247
       -
                   const fb = common.aux.fb_from_limine(fb_response.getFramebuffers()[0]);

     

       248
       248
       -
                   common.init_data.framebuffer = fb;

     

       249
       249
       -
                   // Create a canvas for the console to render to

     

       250
       250
       -
                   const canvas: [*]u8 = @ptrFromInt(common.init_data.bootmem.allocMem(fb.width * fb.height * fb.bypp) catch @panic("Couldn't allocate a canvas"));

     

       251
       251
       -
                   @memset(canvas[0 .. fb.width * fb.height * fb.bypp], 0);

     

       83
       83
       +
                   const fb = fb_response.getFramebuffers()[0];

     

       84
       84
       +
                   common.init_data.framebuffer = .{

     

       85
       85
       +
                       .address = @ptrCast(@alignCast(fb.address)),

     

       86
       86
       +
                       .width = fb.width,

     

       87
       87
       +
                       .height = fb.height,

     

       88
       88
       +
                       .pitch = fb.pitch,

     

       89
       89
       +
                       .red_mask_size = fb.red_mask_size,

     

       90
       90
       +
                       .red_mask_shift = fb.red_mask_shift,

     

       91
       91
       +
                       .green_mask_size = fb.green_mask_size,

     

       92
       92
       +
                       .green_mask_shift = fb.green_mask_shift,

     

       93
       93
       +
                       .blue_mask_size = fb.blue_mask_size,

     

       94
       94
       +
                       .blue_mask_shift = fb.blue_mask_shift,

     

       95
       95
       +
                       .bypp = fb.bpp / 8,

     

       96
       96
       +
                   };

     

       97
       97
       +
               }

     

       98
       98
       +
           }

     

       252
       99
        
       

     

       253
       253
       -
                   common.init_data.console = console.Console.init(fb, canvas);

     

       100
       100
       +
           // Add in ACPI/dtb if found, prefer ACPI

     

       101
       101
       +
           initHwDesc();

     

       102
       102
       +
       

     

       103
       103
       +
           // Attach the root task

     

       104
       104
       +
           if (limine_requests.modules.response) |module_response| {

     

       105
       105
       +
               if (module_response.module_count > 0) {

     

       106
       106
       +
                   const mod = module_response.modules.?[0];

     

       107
       107
       +
                   const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       108
       108
       +
                   const mod_size = mod.size;

     

       109
       109
       +
                   log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       110
       110
       +
                   common.init_data.root_task = mod_addr[0..mod_size];

     

       254
       111
        
               }

     

       112
       112
       +
           } else {

     

       113
       113
       +
               @branchHint(.unlikely);

     

       114
       114
       +
               @panic("No root task found!");

     

       255
       115
        
           }

     

       116
       116
       +
       

     

       117
       117
       +
           bootstrapAPs();

     

       256
       118
        
       }

     

       257
       119
        
       

     

       258
       120
        
       fn initHwDesc() void {

+32 -2

components/ukernel/arch/amd64/instructions/cpuid.zig

···

       21
       21
        
           const res = cpuid(1, 0);

     

       22
       22
        
           const feat_ecx: FeaturesEcx = @bitCast(res.ecx);

     

       23
       23
        
           arch.interrupts.apic.tsc_deadline_available = feat_ecx.tsc_deadline;

     

       24
       24
       +
           arch.interrupts.apic.has_x2apic = feat_ecx.x2apic;

     

       24
       25
        
       }

     

       25
       26
        
       

     

       26
       27
        
       const FeaturesEcx = packed struct(u32) {

     

       27
       27
       -
           _reserved0: u24,

     

       28
       28
       +
           sse3: bool,

     

       29
       29
       +
           pclmulqdq: bool,

     

       30
       30
       +
           dtes64: bool,

     

       31
       31
       +
           monitor: bool,

     

       32
       32
       +
           ds_cpl: bool,

     

       33
       33
       +
           vmx: bool,

     

       34
       34
       +
           smx: bool,

     

       35
       35
       +
           est: bool,

     

       36
       36
       +
           tm2: bool,

     

       37
       37
       +
           ssse3: bool,

     

       38
       38
       +
           cnxt_id: bool,

     

       39
       39
       +
           sdbg: bool,

     

       40
       40
       +
           fma: bool,

     

       41
       41
       +
           cx16: bool,

     

       42
       42
       +
           xtpr: bool,

     

       43
       43
       +
           pdcm: bool,

     

       44
       44
       +
           _reserved0: bool,

     

       45
       45
       +
           pcid: bool,

     

       46
       46
       +
           dca: bool,

     

       47
       47
       +
           sse4_1: bool,

     

       48
       48
       +
           sse4_2: bool,

     

       49
       49
       +
           x2apic: bool,

     

       50
       50
       +
           movbe: bool,

     

       51
       51
       +
           popcnt: bool,

     

       28
       52
        
           tsc_deadline: bool,

     

       29
       29
       -
           _reserved1: u7,

     

       53
       53
       +
           aesni: bool,

     

       54
       54
       +
           xsave: bool,

     

       55
       55
       +
           osxsave: bool,

     

       56
       56
       +
           avx: bool,

     

       57
       57
       +
           f16c: bool,

     

       58
       58
       +
           rdrand: bool,

     

       59
       59
       +
           hypervisor: bool,

     

       30
       60
        
       };

     

       31
       61
        
       

     

       32
       62
        
       pub inline fn cpuid(leaf: u32, sub: u32) DefaultResults {

+40 -7

components/ukernel/arch/amd64/interrupts/apic.zig

···

       1
       1
        
       const std = @import("std");

     

       2
       2
        
       const arch = @import("../root.zig");

     

       3
       3
       +
       const idt = arch.interrupts.idt;

     

       3
       4
        
       const log = std.log.scoped(.apic);

     

       5
       5
       +
       const common = @import("common");

     

       4
       6
        
       

     

       5
       7
        
       pub var lapic_timer_khz: usize = 0;

     

       6
       8
        
       pub var tsc_deadline_available = false;

     

       9
       9
       +
       pub var has_x2apic: bool = false;

     

       7
       10
        
       

     

       8
       11
        
       // tbh every cpu will be either x2apic or not, and if xapic it will

     

       9
       12
        
       // have the exact same base address anyways so this is fine

     
···

       225
       228
        
       };

     

       226
       229
        
       

     

       227
       230
        
       pub const init = struct {

     

       228
       228
       -
           // Get the APIC ready (call first)

     

       229
       231
        
           pub fn initialSetup() void {

     

       232
       232
       +
               // First, make the APIC accessible

     

       233
       233
       +
               initSingleton() catch |err| {

     

       234
       234
       +
                   log.err("Failed to map APIC! {}", .{err});

     

       235
       235
       +
                   @panic("initSingleton");

     

       236
       236
       +
               };

     

       237
       237
       +
               // Set up the interrupt handlers

     

       230
       238
        
               singleton.setSpuriousInterruptRegister(.{

     

       231
       239
        
                   .apic_soft_enable = true,

     

       232
       240
        
                   .idt_entry = 0xFF,

     
···

       235
       243
        
               //     .priority_class = 0,

     

       236
       244
        
               //     .priority_sub_class = 0,

     

       237
       245
        
               // });

     

       238
       238
       -
               arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, spurious_interrupt_handler, 3, 0);

     

       239
       239
       -
               arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, periodic_handler, 3, 0);

     

       246
       246
       +
               arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, u64, spurious_interrupt_handler, 3, 0);

     

       247
       247
       +
               arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, u64, timer_handler, 3, 0);

     

       240
       248
        
       

     

       249
       249
       +
               // Calibrate against the TSC

     

       241
       250
        
               calibrateTimer();

     

       251
       251
       +
               // Set up the LVT Timer Register

     

       252
       252
       +
               enableOneshotInterrupt();

     

       253
       253
       +
           }

     

       254
       254
       +
       

     

       255
       255
       +
           fn initSingleton() !void {

     

       256
       256
       +
               arch.interrupts.apic.singleton = switch (has_x2apic) {

     

       257
       257
       +
                   true => .x2apic,

     

       258
       258
       +
                   false => blk: {

     

       259
       259
       +
                       // Map the APIC first!

     

       260
       260
       +
                       const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       261
       261
       +
                       try common.mm.paging.mapPhys(.{

     

       262
       262
       +
                           .vaddr = @intFromPtr(apic_base),

     

       263
       263
       +
                           .paddr = 0xFEE0_0000,

     

       264
       264
       +
                           .size = 0x1000,

     

       265
       265
       +
                           .memory_type = .DeviceUncacheable,

     

       266
       266
       +
                           .perms = .{

     

       267
       267
       +
                               .x = false,

     

       268
       268
       +
                               .u = false,

     

       269
       269
       +
                               .w = true,

     

       270
       270
       +
                           },

     

       271
       271
       +
                       });

     

       272
       272
       +
                       break :blk .{ .xapic = apic_base };

     

       273
       273
       +
                   },

     

       274
       274
       +
               };

     

       242
       275
        
           }

     

       243
       276
        
       

     

       244
       277
        
           fn calibrateTimer() void {

     
···

       277
       310
        
       

     

       278
       311
        
               lapic_timer_khz = norm / 5;

     

       279
       312
        
       

     

       280
       280
       -
               log.debug("APIC timer: {} kHz", .{lapic_timer_khz});

     

       313
       313
       +
               log.debug("timer: {} kHz", .{lapic_timer_khz});

     

       281
       314
        
           }

     

       282
       315
        
       

     

       283
       283
       -
           pub fn enableOneshotInterrupt() void {

     

       316
       316
       +
           fn enableOneshotInterrupt() void {

     

       284
       317
        
               const mode: LAPIC.LVTTimerRegister.Mode = switch (tsc_deadline_available) {

     

       285
       318
        
                   true => .tsc_deadline,

     

       286
       319
        
                   false => blk: {

     
···

       312
       345
        
           }

     

       313
       346
        
       }

     

       314
       347
        
       

     

       315
       315
       -
       pub fn spurious_interrupt_handler(_: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       348
       348
       +
       pub fn spurious_interrupt_handler(_: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       316
       349
        
           log.warn("Got a spurious interrupt!", .{});

     

       317
       350
        
       }

     

       318
       351
        
       

     

       319
       319
       -
       pub fn periodic_handler(stack_trace: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       352
       352
       +
       pub fn timer_handler(stack_trace: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       320
       353
        
           log.warn("Got an APIC timer interrupt, incrementing user's rsi...", .{});

     

       321
       354
        
           stack_trace.regs.rsi += 1;

     

       322
       355
        
           singleton.setRegister(.eoi, 0);

+12 -10

components/ukernel/arch/amd64/interrupts/idt.zig

···

       12
       12
        
       // handler, which pushes more information then calls the user

     

       13
       13
        
       // defined handler. Use common sense and don't return from an exception

     

       14
       14
        
       // which shouldn't be returned from.

     

       15
       15
       -
       const DefinedHandler = *const fn (*InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void;

     

       16
       16
       -
       pub export var defined_handlers: [entry_count]DefinedHandler = undefined;

     

       15
       15
       +
       pub const CallConv: std.builtin.CallingConvention = .{ .x86_64_sysv = .{} };

     

       16
       16
       +
       pub fn InterruptHandler(comptime E: type) type {

     

       17
       17
       +
           return *const fn (*InterruptFrame(E)) callconv(CallConv) void;

     

       18
       18
       +
       }

     

       19
       19
       +
       pub export var defined_handlers: [entry_count]InterruptHandler(u64) = undefined;

     

       17
       20
        
       

     

       18
       21
        
       // The actual handlers with addresses in the IDT.

     

       19
       22
        
       const ActualHandler = *const fn () callconv(.naked) void;

     
···

       268
       271
        
               eflags: u64,

     

       269
       272
        
               rsp: u64,

     

       270
       273
        
               ss: u16 align(8),

     

       274
       274
       +
       

     

       275
       275
       +
               pub fn normalize(self: *InterruptFrame(ErrorCode)) *InterruptFrame(u64) {

     

       276
       276
       +
                   return @ptrCast(self);

     

       277
       277
       +
               }

     

       271
       278
        
           };

     

       272
       279
        
       }

     

       273
       280
        
       

     
···

       283
       290
        
       

     

       284
       291
        
           // Finally, load the idt

     

       285
       292
        
           load();

     

       286
       286
       -
       

     

       287
       287
       -
           add_handler(.{ .exception = .breakpoint }, arch.interrupts.breakpoint, 3, 0);

     

       288
       288
       -
           add_handler(.{ .exception = .double_fault }, arch.interrupts.double_fault, 3, 0);

     

       289
       289
       -
           add_handler(.{ .exception = .general_protection_fault }, arch.interrupts.general_protection_fault, 3, 0);

     

       290
       290
       -
           add_handler(.{ .exception = .page_fault }, arch.mm.paging.page_fault_handler, 3, 0);

     

       291
       293
        
       }

     

       292
       294
        
       

     

       293
       295
        
       pub fn load() void {

     
···

       298
       300
        
           idtr.load();

     

       299
       301
        
       }

     

       300
       302
        
       

     

       301
       301
       -
       pub fn add_handler(interrupt: Interrupt, handler: anytype, dpl: u2, ist: u3) void {

     

       303
       303
       +
       pub fn add_handler(interrupt: Interrupt, comptime E: type, handler: InterruptHandler(E), dpl: u2, ist: u3) void {

     

       302
       304
        
           // Modify the type, dpl, and ist in place

     

       303
       305
        
           var tmp = interrupt_descriptor_table[interrupt.interrupt];

     

       304
       306
        
           tmp.options.dpl = dpl;

     

       305
       307
        
           tmp.options.ist_index = ist;

     

       306
       308
        
           interrupt_descriptor_table[interrupt.interrupt] = tmp;

     

       307
       309
        
       

     

       308
       308
       -
           // Add the DefinedHandler

     

       309
       309
       -
           defined_handlers[interrupt.interrupt] = @ptrCast(&handler);

     

       310
       310
       +
           // Add the InterruptHandler

     

       311
       311
       +
           defined_handlers[interrupt.interrupt] = @ptrCast(handler);

     

       310
       312
        
       }

+3 -2

components/ukernel/arch/amd64/interrupts/pic.zig

···

       1
       1
        
       /// Remap the 8259 PIC to an interrupt base of 0x32

     

       2
       2
        
       const arch = @import("../root.zig");

     

       3
       3
       +
       const idt = arch.interrupts.idt;

     

       3
       4
        
       const std = @import("std");

     

       4
       5
        
       const log = std.log.scoped(.pic);

     

       5
       6
        
       const out = arch.port.out;

     
···

       52
       53
        
           wait();

     

       53
       54
        
       

     

       54
       55
        
           // Set up a spurious IRQ7 handler

     

       55
       55
       -
           arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, spurious_handler, 3, 0);

     

       56
       56
       +
           arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, u64, spurious_handler, 3, 0);

     

       56
       57
        
       }

     

       57
       58
        
       

     

       58
       59
        
       inline fn wait() void {

     
···

       64
       65
        
           out(u8, PIC_ONE_CMD_PORT, CMD_EOI);

     

       65
       66
        
       }

     

       66
       67
        
       

     

       67
       67
       -
       pub fn spurious_handler(_: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       68
       68
       +
       pub fn spurious_handler(_: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       68
       69
        
           std.log.warn("Got a spurious IRQ7 (8259)", .{});

     

       69
       70
        
       }

+96 -6

components/ukernel/arch/amd64/interrupts/root.zig

···

       3
       3
        
       pub const pit = @import("pit.zig");

     

       4
       4
        
       pub const idt = @import("idt.zig");

     

       5
       5
        
       const std = @import("std");

     

       6
       6
       +
       const log = std.log.scoped(.interrupts);

     

       6
       7
        
       const arch = @import("../root.zig");

     

       7
       8
        
       

     

       8
       9
        
       pub inline fn enable() void {

     
···

       12
       13
        
           asm volatile ("cli");

     

       13
       14
        
       }

     

       14
       15
        
       

     

       15
       15
       -
       fn print_regs(frame: *idt.InterruptFrame(u64)) void {

     

       16
       16
       +
       const syscall_entry = @extern(*anyopaque, .{

     

       17
       17
       +
           .name = "syscall_entry",

     

       18
       18
       +
       });

     

       19
       19
       +
       

     

       20
       20
       +
       export fn syscall_handler(rdi: usize, rsi: usize) callconv(.c) void {

     

       21
       21
       +
           std.log.info("Got a syscall! rdi=0x{x}, rsi=0x{x}", .{ rdi, rsi });

     

       22
       22
       +
       }

     

       23
       23
       +
       

     

       24
       24
       +
       pub fn init_syscalls() void {

     

       25
       25
       +
           // Set up the STAR MSR with the segment descriptors

     

       26
       26
       +
           const IA32_STAR = arch.registers.MSR(u64, 0xC0000081);

     

       27
       27
       +
           const star_value: u64 = 0 | @as(u64, arch.structures.gdt.StandardGdt.selectors.kernel_code) << 32 | (@as(u64, arch.structures.gdt.StandardGdt.selectors.tss_desc + 8) | 3) << 48;

     

       28
       28
       +
           IA32_STAR.write(star_value);

     

       29
       29
       +
       

     

       30
       30
       +
           // Set up the EFER MSR with SCE (System Call Enable)

     

       31
       31
       +
           const IA32_EFER = arch.registers.MSR(u64, 0xC0000080);

     

       32
       32
       +
           const efer_val = IA32_EFER.read() | 0b1;

     

       33
       33
       +
           IA32_EFER.write(efer_val);

     

       34
       34
       +
       

     

       35
       35
       +
           // Set up LSTAR with the syscall handler and FMASK to clear interrupts

     

       36
       36
       +
           const IA32_LSTAR = arch.registers.MSR(u64, 0xC0000082);

     

       37
       37
       +
           IA32_LSTAR.write(@intFromPtr(syscall_entry));

     

       38
       38
       +
       

     

       39
       39
       +
           const IA32_FMASK = arch.registers.MSR(u64, 0xC0000084);

     

       40
       40
       +
           IA32_FMASK.write(1 << 9);

     

       41
       41
       +
       }

     

       42
       42
       +
       

     

       43
       43
       +
       pub fn print_regs(frame: *idt.InterruptFrame(u64)) void {

     

       16
       44
        
           std.log.err("CR3: 0x{x:0>16}", .{frame.cr3});

     

       17
       45
        
           std.log.err("RAX: 0x{x:0>16}, RBX: 0x{x:0>16}, RCX: 0x{x:0>16}, RDX: 0x{x:0>16}", .{ frame.regs.rax, frame.regs.rbx, frame.regs.rcx, frame.regs.rdx });

     

       18
       46
        
           std.log.err("RSI: 0x{x:0>16}, RDI: 0x{x:0>16}, RBP: 0x{x:0>16}, RSP: 0x{x:0>16}", .{ frame.regs.rsi, frame.regs.rdi, frame.regs.rbp, frame.rsp });

     
···

       21
       49
        
           std.log.err("RFL: 0x{x:0>16}, RIP: 0x{x:0>16}, CS:  0x{x:0>16}, SS:  0x{x:0>16}", .{ frame.eflags, frame.rip, frame.cs, frame.ss });

     

       22
       50
        
       }

     

       23
       51
        
       

     

       24
       24
       -
       pub fn unhandled_interrupt(frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       52
       52
       +
       pub fn unhandled_interrupt(frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       25
       53
        
           if (std.enums.tagName(idt.Exception, frame.int_num.exception)) |exception_name| {

     

       26
       54
        
               std.log.err("Unhandled interrupt (0x{x} : {s})!!!", .{ frame.int_num.interrupt, exception_name });

     

       27
       55
        
           } else {

     
···

       34
       62
        
           arch.instructions.die();

     

       35
       63
        
       }

     

       36
       64
        
       

     

       37
       37
       -
       pub fn breakpoint(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       65
       65
       +
       pub fn breakpoint(stack_frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       38
       66
        
           std.log.warn("Breakpoint @ 0x{x}, returning execution...", .{stack_frame.rip});

     

       39
       67
        
       }

     

       40
       68
        
       

     

       41
       41
       -
       pub fn double_fault(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       69
       69
       +
       pub fn double_fault(stack_frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       42
       70
        
           std.log.err("Double fault @ 0x{x}, dying!!!", .{stack_frame.rip});

     

       43
       71
        
           print_regs(stack_frame);

     

       44
       72
        
           arch.interrupts.disable();

     

       45
       73
        
           arch.instructions.die();

     

       46
       74
        
       }

     

       47
       75
        
       

     

       48
       48
       -
       pub fn general_protection_fault(stack_frame: *idt.InterruptFrame(idt.SelectorErrorCode)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       76
       76
       +
       pub fn general_protection_fault(stack_frame: *idt.InterruptFrame(idt.SelectorErrorCode)) callconv(idt.CallConv) void {

     

       49
       77
        
           std.log.warn("General Protection Fault @ 0x{x}", .{stack_frame.rip});

     

       50
       78
        
       

     

       51
       79
        
           const target = stack_frame.error_code.parse();

     
···

       64
       92
        
                   std.log.warn("LDT selector: 0x{x}", .{ldt_sel});

     

       65
       93
        
               },

     

       66
       94
        
           }

     

       67
       67
       -
           print_regs(@ptrCast(stack_frame));

     

       95
       95
       +
           print_regs(stack_frame.normalize());

     

       68
       96
        
           arch.instructions.die();

     

       69
       97
        
       }

     

       98
       98
       +
       

     

       99
       99
       +
       // Set up the IDT, PIC, TSC, and APIC

     

       100
       100
       +
       pub fn init() void {

     

       101
       101
       +
           // Set up the IDT and associated vectors

     

       102
       102
       +
           idt.init();

     

       103
       103
       +
           idt.add_handler(.{ .exception = .breakpoint }, u64, arch.interrupts.breakpoint, 3, 0);

     

       104
       104
       +
           idt.add_handler(.{ .exception = .double_fault }, u64, arch.interrupts.double_fault, 3, 0);

     

       105
       105
       +
           idt.add_handler(.{ .exception = .general_protection_fault }, idt.SelectorErrorCode, arch.interrupts.general_protection_fault, 3, 0);

     

       106
       106
       +
           idt.add_handler(.{ .exception = .page_fault }, u64, arch.mm.paging.page_fault_handler, 3, 0);

     

       107
       107
       +
           // Set up the 8254's (we need 8259 timer to calibrate tsc)

     

       108
       108
       +
           pic.init();

     

       109
       109
       +
           // Calibrate the TSC against the 8259

     

       110
       110
       +
           arch.tsc.calibrate_pit() catch |err| {

     

       111
       111
       +
               log.err("Failed to calibrate TSC: {}", .{err});

     

       112
       112
       +
           };

     

       113
       113
       +
           // Set up everything needed to arm the timer

     

       114
       114
       +
           apic.init.initialSetup();

     

       115
       115
       +
       }

     

       116
       116
       +
       

     

       117
       117
       +
       // TODO: make this slightly less shit

     

       118
       118
       +
       pub fn enter_userspace(entry: u64, arg: u64, stack: u64) noreturn {

     

       119
       119
       +
           log.info("usercode64 GDT 0x{x}, userdata64 GDT 0x{x}", .{ arch.structures.gdt.StandardGdt.selectors.user_code, arch.structures.gdt.StandardGdt.selectors.user_data });

     

       120
       120
       +
           const cr3 = arch.registers.ControlRegisters.Cr3.read();

     

       121
       121
       +
           arch.registers.ControlRegisters.Cr3.write(cr3);

     

       122
       122
       +
           asm volatile (

     

       123
       123
       +
               \\ push %[userdata64]

     

       124
       124
       +
               \\ push %[stack]

     

       125
       125
       +
               \\ push $0x202

     

       126
       126
       +
               \\ push %[usercode64]

     

       127
       127
       +
               \\ push %[entry]

     

       128
       128
       +
               \\

     

       129
       129
       +
               \\ mov %[userdata64], %%rax

     

       130
       130
       +
               \\ mov %%rax, %%es

     

       131
       131
       +
               \\ mov %%rax, %%ds

     

       132
       132
       +
               \\

     

       133
       133
       +
               \\ xor %%rsi, %%rsi

     

       134
       134
       +
               \\ xor %%rax, %%rax

     

       135
       135
       +
               \\ xor %%rdx, %%rdx

     

       136
       136
       +
               \\ xor %%rcx, %%rcx

     

       137
       137
       +
               \\ xor %%rbp, %%rbp

     

       138
       138
       +
               \\ xor %%rbx, %%rbx

     

       139
       139
       +
               \\

     

       140
       140
       +
               \\ xor %%r8, %%r8

     

       141
       141
       +
               \\ xor %%r9, %%r9

     

       142
       142
       +
               \\ xor %%r10, %%r10

     

       143
       143
       +
               \\ xor %%r11, %%r11

     

       144
       144
       +
               \\ xor %%r12, %%r12

     

       145
       145
       +
               \\ xor %%r13, %%r13

     

       146
       146
       +
               \\ xor %%r14, %%r14

     

       147
       147
       +
               \\ xor %%r15, %%r15

     

       148
       148
       +
               \\

     

       149
       149
       +
               \\ iretq

     

       150
       150
       +
               \\

     

       151
       151
       +
               :

     

       152
       152
       +
               : [arg] "{rdi}" (arg),

     

       153
       153
       +
                 [stack] "r" (stack),

     

       154
       154
       +
                 [entry] "r" (entry),

     

       155
       155
       +
                 [userdata64] "i" (arch.structures.gdt.StandardGdt.selectors.user_data),

     

       156
       156
       +
                 [usercode64] "i" (arch.structures.gdt.StandardGdt.selectors.user_code),

     

       157
       157
       +
           );

     

       158
       158
       +
           unreachable;

     

       159
       159
       +
       }

+3 -1

components/ukernel/arch/amd64/mm/paging.zig

···

       331
       331
        
           ptr: usize,

     

       332
       332
        
       };

     

       333
       333
        
       

     

       334
       334
       -
       pub fn page_fault_handler(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       334
       334
       +
       pub fn page_fault_handler(stack_frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       335
       335
        
           std.log.err("Page Fault @ 0x{x}, dying...", .{stack_frame.rip});

     

       336
       336
       +
           arch.interrupts.print_regs(stack_frame.normalize());

     

       337
       337
       +
           std.log.err("Error CR2: 0x{x:0>16}, Error Code: 0x{x:0>16}", .{ arch.registers.ControlRegisters.Cr2.read(), stack_frame.error_code });

     

       336
       338
        
           arch.instructions.die();

     

       337
       339
        
       }

+7 -15

components/ukernel/arch/amd64/root.zig

···

       9
       9
        
       const common = @import("common");

     

       10
       10
        
       const std = @import("std");

     

       11
       11
        
       

     

       12
       12
       -
       fn pageSize() usize {

     

       13
       13
       -
           return 4 << 10;

     

       14
       14
       -
       }

     

       15
       15
       -
       

     

       16
       16
       -
       pub const std_options: std.Options = .{

     

       17
       17
       -
           .logFn = common.aux.logFn,

     

       18
       18
       -
           .page_size_min = 4 << 10,

     

       19
       19
       -
           .page_size_max = 4 << 10,

     

       20
       20
       -
           .queryPageSize = pageSize,

     

       12
       12
       +
       // needed by std options

     

       13
       13
       +
       pub const page_size = struct {

     

       14
       14
       +
           pub const min = 4 << 10;

     

       15
       15
       +
           pub const max = 4 << 10;

     

       16
       16
       +
           pub fn get() usize {

     

       17
       17
       +
               return 4 << 10;

     

       18
       18
       +
           }

     

       21
       19
        
       };

     

       22
       22
       -
       pub const panic = std.debug.FullPanic(common.aux.panic);

     

       23
       20
        
       

     

       24
       21
        
       pub var per_cpu_init_data: PerCpuInitData = .{};

     

       25
       22
        
       

     
···

       49
       46
        
               self.tss_buf = tss_buf[0..cpu_count];

     

       50
       47
        
           }

     

       51
       48
        
       };

     

       52
       52
       -
       

     

       53
       53
       -
       comptime {

     

       54
       54
       -
           // Entry point (_start)

     

       55
       55
       -
           @export(&boot.bsp_init, .{ .name = "_start", .linkage = .strong });

     

       56
       56
       -
       }

components/ukernel/arch/amd64/tsc.zig

···

       1
       1
        
       const arch = @import("root.zig");

     

       2
       2
       +
       const std = @import("std");

     

       2
       3
        
       const out = arch.port.out;

     

       3
       4
        
       const in = arch.port.in;

     

       5
       5
       +
       const log = std.log.scoped(.tsc);

     

       4
       6
        
       

     

       5
       7
        
       pub var tsc_khz: usize = 0;

     

       6
       8
        
       

     
···

       45
       47
        
           if (pollcnt < 1000) return error.PitError;

     

       46
       48
        
       

     

       47
       49
        
           tsc_khz = (end - start) / 50;

     

       50
       50
       +
       

     

       51
       51
       +
           log.debug("{} MHz", .{tsc_khz / 1000});

     

       48
       52
        
       }

     

       49
       53
        
       

     

       50
       54
        
       /// Delay for a set amount of ms using crappy polling

+9 -17

components/ukernel/build.zig

···

       45
       45
        
           const target = b.resolveTargetQuery(target_query);

     

       46
       46
        
           const optimize = b.standardOptimizeOption(.{ .preferred_optimize_mode = .ReleaseSafe });

     

       47
       47
        
       

     

       48
       48
       -
           const arch_module = b.createModule(.{

     

       49
       49
       -
               .root_source_file = b.path(arch_root_path),

     

       48
       48
       +
           const common_mod = b.createModule(.{

     

       49
       49
       +
               .root_source_file = b.path("common/root.zig"),

     

       50
       50
        
               .target = target,

     

       51
       51
        
               .optimize = optimize,

     

       52
       52
        
               .code_model = code_model,

     

       53
       53
        
           });

     

       54
       54
        
       

     

       55
       55
       +
           const arch_module = b.createModule(.{

     

       56
       56
       +
               .root_source_file = b.path(arch_root_path),

     

       57
       57
       +
           });

     

       55
       58
        
           switch (arch) {

     

       56
       59
        
               .amd64 => {

     

       57
       60
        
                   arch_module.addAssemblyFile(b.path("arch/amd64/asm/traps.S"));

     
···

       59
       62
        
               else => {},

     

       60
       63
        
           }

     

       61
       64
        
       

     

       62
       62
       -
           const limine_dep = b.dependency("limine", .{

     

       63
       63
       -
               .api_revision = 3,

     

       64
       64
       -
           });

     

       65
       65
       -
           const spinlock_dep = b.dependency("spinlock", .{});

     

       66
       66
       -
           const console_dep = b.dependency("console", .{});

     

       67
       67
       -
       

     

       68
       68
       -
           const limine_mod = limine_dep.module("limine");

     

       69
       69
       -
           const spinlock_mod = spinlock_dep.module("spinlock");

     

       70
       70
       -
           const console_mod = console_dep.module("console");

     

       71
       71
       -
       

     

       72
       72
       -
           const common_mod = b.createModule(.{

     

       73
       73
       -
               .root_source_file = b.path("common/root.zig"),

     

       74
       74
       -
           });

     

       65
       65
       +
           const spinlock_mod = b.dependency("spinlock", .{}).module("spinlock");

     

       66
       66
       +
           const limine_mod = b.dependency("limine", .{ .api_revision = 3 }).module("limine");

     

       67
       67
       +
           const console_mod = b.dependency("console", .{}).module("console");

     

       75
       68
        
       

     

       76
       69
        
           arch_module.addImport("limine", limine_mod);

     

       77
       70
        
           arch_module.addImport("console", console_mod);

     
···

       80
       73
        
           common_mod.addImport("arch", arch_module);

     

       81
       74
        
           common_mod.addImport("spinlock", spinlock_mod);

     

       82
       75
        
           common_mod.addImport("console", console_mod);

     

       83
       83
       -
           common_mod.addImport("limine", limine_mod);

     

       84
       76
        
       

     

       85
       77
        
           const kernel = b.addExecutable(.{

     

       86
       78
        
               .name = "ukernel",

     

       87
       87
       -
               .root_module = arch_module,

     

       79
       79
       +
               .root_module = common_mod,

     

       88
       80
        
               // TODO: remove when x86 backend is less broken with removing CPU features

     

       89
       81
        
               .use_llvm = true,

     

       90
       82
        
           });

+9 -15

components/ukernel/common/aux.zig

···

       4
       4
        
       const std = @import("std");

     

       5
       5
        
       const arch = @import("arch");

     

       6
       6
        
       const spinlock = @import("spinlock");

     

       7
       7
       -
       const limine = @import("limine");

     

       8
       7
        
       

     

       9
       8
        
       // Types

     

       10
       9
        
       pub const HardwareDescription = union(enum) {

     
···

       22
       21
        
           hardware_description: HardwareDescription = .none,

     

       23
       22
        
           root_task: []align(4096) u8 = undefined,

     

       24
       23
        
           hhdm_slide: usize = 0,

     

       24
       24
       +
           kernel_paging_ctx: arch.mm.paging.Context = undefined,

     

       25
       25
        
       };

     

       26
       26
        
       

     

       27
       27
       -
       pub fn fb_from_limine(fb: *const limine.Framebuffer) console.Framebuffer {

     

       28
       28
       -
           return .{

     

       29
       29
       -
               .address = @ptrCast(@alignCast(fb.address)),

     

       30
       30
       -
               .width = fb.width,

     

       31
       31
       -
               .height = fb.height,

     

       32
       32
       -
               .pitch = fb.pitch,

     

       33
       33
       -
               .red_mask_size = fb.red_mask_size,

     

       34
       34
       -
               .red_mask_shift = fb.red_mask_shift,

     

       35
       35
       -
               .green_mask_size = fb.green_mask_size,

     

       36
       36
       -
               .green_mask_shift = fb.green_mask_shift,

     

       37
       37
       -
               .blue_mask_size = fb.blue_mask_size,

     

       38
       38
       -
               .blue_mask_shift = fb.blue_mask_shift,

     

       39
       39
       -
               .bypp = fb.bpp / 8,

     

       40
       40
       -
           };

     

       27
       27
       +
       pub fn initConsole() void {

     

       28
       28
       +
           const fb = common.init_data.framebuffer.?;

     

       29
       29
       +
           // Create a canvas for the console to render to

     

       30
       30
       +
           const canvas: [*]u8 = @ptrFromInt(common.init_data.bootmem.allocMem(fb.width * fb.height * fb.bypp) catch @panic("Couldn't allocate a canvas"));

     

       31
       31
       +
           @memset(canvas[0 .. fb.width * fb.height * fb.bypp], 0);

     

       32
       32
       +
       

     

       33
       33
       +
           // Set the console instance

     

       34
       34
       +
           common.init_data.console = console.Console.init(fb, canvas);

     

       41
       35
        
       }

     

       42
       36
        
       

     

       43
       37
        
       var stdout_lock: spinlock.Spinlock = .{};

+3 -2

components/ukernel/common/mm/paging.zig

···

       1
       1
        
       const arch = @import("arch");

     

       2
       2
        
       const std = @import("std");

     

       3
       3
       +
       const common = @import("../root.zig");

     

       3
       4
        
       const TableHandle = arch.mm.paging.TableHandle;

     

       4
       5
        
       const MemoryType = arch.mm.paging.MemoryType;

     

       5
       6
        
       const Context = arch.mm.paging.Context;

     
···

       46
       47
        
           size: usize,

     

       47
       48
        
           perms: Perms,

     

       48
       49
        
           memory_type: MemoryType,

     

       49
       49
       -
           context: *Context,

     

       50
       50
       +
           context: *Context = &common.init_data.kernel_paging_ctx,

     

       50
       51
        
       }) !void {

     

       51
       52
        
           const root = args.context.root_table(args.vaddr);

     

       52
       53
        
           var vaddr = args.vaddr;

     
···

       60
       61
        
           size: usize,

     

       61
       62
        
           perms: Perms,

     

       62
       63
        
           memory_type: MemoryType,

     

       63
       63
       -
           context: *Context,

     

       64
       64
       +
           context: *Context = &common.init_data.kernel_paging_ctx,

     

       64
       65
        
       }) !void {

     

       65
       66
        
           const root = args.context.root_table(args.vaddr);

     

       66
       67
        
           var vaddr = args.vaddr;

+63

components/ukernel/common/root.zig

···

       1
       1
        
       pub const aux = @import("aux.zig");

     

       2
       2
        
       pub const mm = @import("mm/root.zig");

     

       3
       3
        
       pub const loadRootTask = loader.loadRootTask;

     

       4
       4
       +
       const arch = @import("arch");

     

       5
       5
       +
       const std = @import("std");

     

       4
       6
        
       const loader = @import("loader.zig");

     

       5
       7
        
       

     

       6
       8
        
       // Arch init must set up appropriate fields!

     

       7
       9
        
       pub var init_data: aux.InitState = .{};

     

       10
       10
       +
       

     

       11
       11
       +
       // Generic bsp init

     

       12
       12
       +
       pub fn generic_init() callconv(.c) noreturn {

     

       13
       13
       +
           const log = std.log.scoped(.generic_init);

     

       14
       14
       +
           // First, do early arch init

     

       15
       15
       +
           arch.boot.early_init();

     

       16
       16
       +
       

     

       17
       17
       +
           // Now, set up the bootmem and console

     

       18
       18
       +
           mm.bootmem.init();

     

       19
       19
       +
       

     

       20
       20
       +
           // Now, do the rest of the arch init

     

       21
       21
       +
           arch.boot.bsp_init();

     

       22
       22
       +
       

     

       23
       23
       +
           // Next, set up the console

     

       24
       24
       +
           aux.initConsole();

     

       25
       25
       +
       

     

       26
       26
       +
           // Now, set up interrupts

     

       27
       27
       +
           arch.interrupts.init();

     

       28
       28
       +
       

     

       29
       29
       +
           log.info("Loading root task...", .{});

     

       30
       30
       +
       

     

       31
       31
       +
           // The following needs to be genericized and unshittified

     

       32
       32
       +
       

     

       33
       33
       +
           // Allocate a stack

     

       34
       34
       +
           mm.paging.map(.{

     

       35
       35
       +
               .vaddr = 0x7ffe_0000_0000,

     

       36
       36
       +
               .size = 65536,

     

       37
       37
       +
               .memory_type = .MemoryWriteBack,

     

       38
       38
       +
               .perms = .{

     

       39
       39
       +
                   .x = false,

     

       40
       40
       +
                   .u = true,

     

       41
       41
       +
                   .w = true,

     

       42
       42
       +
               },

     

       43
       43
       +
           }) catch @panic("couldn't map user stack");

     

       44
       44
       +
       

     

       45
       45
       +
           // TODO: make user page tables!

     

       46
       46
       +
           const entry = loadRootTask(&init_data.kernel_paging_ctx) catch |err| {

     

       47
       47
       +
               log.err("Couldn't load the root task! {}", .{err});

     

       48
       48
       +
               @panic("ggz");

     

       49
       49
       +
           };

     

       50
       50
       +
           log.info("Dropping to userspace entry 0x{x:0>16}", .{entry});

     

       51
       51
       +
       

     

       52
       52
       +
           arch.interrupts.init_syscalls();

     

       53
       53
       +
       

     

       54
       54
       +
           arch.interrupts.apic.armTimer(1000);

     

       55
       55
       +
           arch.interrupts.enter_userspace(entry, 0x69, 0x7ffe_0001_0000);

     

       56
       56
       +
       }

     

       57
       57
       +
       

     

       58
       58
       +
       // std options etc.

     

       59
       59
       +
       pub const panic = std.debug.FullPanic(aux.panic);

     

       60
       60
       +
       pub const std_options: std.Options = .{

     

       61
       61
       +
           .logFn = aux.logFn,

     

       62
       62
       +
           .page_size_min = arch.page_size.min,

     

       63
       63
       +
           .page_size_max = arch.page_size.max,

     

       64
       64
       +
           .queryPageSize = arch.page_size.get,

     

       65
       65
       +
       };

     

       66
       66
       +
       

     

       67
       67
       +
       comptime {

     

       68
       68
       +
           // Entry point (_start)

     

       69
       69
       +
           @export(&generic_init, .{ .name = "_start", .linkage = .strong });

     

       70
       70
       +
       }