···

       
2
       
 
       
//AMD64 Kernel

     

       
3
       
 
       
  protocol: limine

     

       
4
       
 
       
  path: boot():/kernel-amd64.elf

     

       
5
       
-
       
  module_path: boot():/init-amd64.elf

     

       
0
       
 
       

     

       
6
       
 
       
//aarch64 Kernel

     

       
7
       
 
       
  protocol: limine

     

       
8
       
 
       
  path: boot():/kernel-aarch64.elf

     

···

       
2
       
 
       
//AMD64 Kernel

     

       
3
       
 
       
  protocol: limine

     

       
4
       
 
       
  path: boot():/kernel-amd64.elf

     

       
5
       
+
       
  module_path: boot():/root-69.elf

     

       
6
       
+
       
  module_path: boot():/root-420.elf

     

       
7
       
 
       
//aarch64 Kernel

     

       
8
       
 
       
  protocol: limine

     

       
9
       
 
       
  path: boot():/kernel-aarch64.elf

     

···

       
11
       
 
       
    const ukernel_inst = b.addInstallFile(ukernel_artifact.getEmittedBin(), arch.kernelExeName());

     

       
12
       
 
       
    b.getInstallStep().dependOn(&ukernel_inst.step);

     

       
13
       
 
       


     

       
14
       
-
       
    const root_dep = b.dependency("root_server", .{

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
15
       
 
       
        .arch = arch,

     

       
16
       
-
       
    });

     

       
17
       
-
       
    const root_artifact = root_dep.artifact("root_server");

     

       
18
       
-
       
    const root_inst = b.addInstallFile(root_artifact.getEmittedBin(), arch.rootTaskName());

     

       
19
       
-
       
    b.getInstallStep().dependOn(&root_inst.step);

     

       
20
       
 
       


     

       
21
       
 
       
    // Run in QEMU

     

       
22
       
 
       
    run_blk: {

     

···

       
11
       
 
       
    const ukernel_inst = b.addInstallFile(ukernel_artifact.getEmittedBin(), arch.kernelExeName());

     

       
12
       
 
       
    b.getInstallStep().dependOn(&ukernel_inst.step);

     

       
13
       
 
       


     

       
14
       
+
       
    const root_69 = b.dependency("root_server", .{

     

       
15
       
+
       
        .arch = arch,

     

       
16
       
+
       
        .number = 0x69,

     

       
17
       
+
       
    }).artifact("root_server");

     

       
18
       
+
       
    const root_69_inst = b.addInstallFile(root_69.getEmittedBin(), "root-69.elf");

     

       
19
       
+
       
    b.getInstallStep().dependOn(&root_69_inst.step);

     

       
20
       
+
       


     

       
21
       
+
       
    const root_420 = b.dependency("root_server", .{

     

       
22
       
 
       
        .arch = arch,

     

       
23
       
+
       
        .number = 0x420,

     

       
24
       
+
       
    }).artifact("root_server");

     

       
25
       
+
       
    const root_420_inst = b.addInstallFile(root_420.getEmittedBin(), "root-420.elf");

     

       
26
       
+
       
    b.getInstallStep().dependOn(&root_420_inst.step);

     

       
27
       
 
       


     

       
28
       
 
       
    // Run in QEMU

     

       
29
       
 
       
    run_blk: {

     

···

       
14
       
 
       
            .path = "components/build_helpers",

     

       
15
       
 
       
        },

     

       
16
       
 
       
        .limine_binary = .{

     

       
17
       
-
       
            .url = "git+https://codeberg.org/Limine/Limine?ref=v9.x-binary#acf1e35c4685dba7ef271013db375a727c340ff7",

     

       
18
       
-
       
            .hash = "N-V-__8AAOkzSACT_9p6kmSSly1l008erzXuG39Z6r54B_y0",

     

       
19
       
-
       
            // Codeberg is always down so better to leave it not lazy

     

       
20
       
-
       
            // .lazy = true,

     

       
21
       
 
       
        },

     

       
22
       
 
       
        .edk2_binary = .{

     

       
23
       
 
       
            .url = "git+https://github.com/retrage/edk2-nightly#23068f498687bf64f2b8f80fbcf11e82d987fd9b",

     

···

       
14
       
 
       
            .path = "components/build_helpers",

     

       
15
       
 
       
        },

     

       
16
       
 
       
        .limine_binary = .{

     

       
17
       
+
       
            .url = "git+https://codeberg.org/Limine/Limine?ref=v10.x-binary#648e33afd153bdbf780ba123e45997428796395d",

     

       
18
       
+
       
            .hash = "N-V-__8AAJ8bSADxAGaebgaAbkAR2kqOBy52rXAL0oCumn0t",

     

       
19
       
+
       
            .lazy = true,

     

       
0
       
 
       

     

       
20
       
 
       
        },

     

       
21
       
 
       
        .edk2_binary = .{

     

       
22
       
 
       
            .url = "git+https://github.com/retrage/edk2-nightly#23068f498687bf64f2b8f80fbcf11e82d987fd9b",

     

···

       
3
       
 
       


     

       
4
       
 
       
pub fn build(b: *std.Build) void {

     

       
5
       
 
       
    const arch = b.option(build_helpers.Architecture, "arch", "The target root_server architecture") orelse .amd64;

     

       
0
       
 
       

     

       
6
       
 
       


     

       
7
       
 
       
    // set CPU features based on the architecture

     

       
8
       
 
       
    const target = b.resolveTargetQuery(.{

     
···

       
20
       
 
       


     

       
21
       
 
       
    const config = b.addOptions();

     

       
22
       
 
       
    config.addOption(build_helpers.Architecture, "arch", arch);

     

       
0
       
 
       

     

       
23
       
 
       


     

       
24
       
 
       
    const build_helpers_dep = b.dependency("build_helpers", .{});

     

       
25
       
 
       


     

···

       
3
       
 
       


     

       
4
       
 
       
pub fn build(b: *std.Build) void {

     

       
5
       
 
       
    const arch = b.option(build_helpers.Architecture, "arch", "The target root_server architecture") orelse .amd64;

     

       
6
       
+
       
    const number = b.option(usize, "number", "The syscall number to use") orelse 0x69;

     

       
7
       
 
       


     

       
8
       
 
       
    // set CPU features based on the architecture

     

       
9
       
 
       
    const target = b.resolveTargetQuery(.{

     
···

       
21
       
 
       


     

       
22
       
 
       
    const config = b.addOptions();

     

       
23
       
 
       
    config.addOption(build_helpers.Architecture, "arch", arch);

     

       
24
       
+
       
    config.addOption(usize, "number", number);

     

       
25
       
 
       


     

       
26
       
 
       
    const build_helpers_dep = b.dependency("build_helpers", .{});

     

       
27
       
 
       


     

···

       
1
       
 
       
const std = @import("std");

     

       
2
       
 
       
const os = @import("os.zig");

     

       
0
       
 
       

     

       
3
       
 
       


     

       
4
       
 
       
export fn _start() callconv(.c) noreturn {

     

       
5
       
-
       
    // _ = os.syscall1(SYS_poke, 0xB16B00B5BADBABE);

     

       
6
       
-
       
    // _ = os.syscall1(SYS_exit, 0x69696969);

     

       
7
       
 
       
    asm volatile ("int3");

     

       
8
       
 
       
    asm volatile (

     

       
9
       
-
       
        \\ mov $0x69696969, %%rdi

     

       
10
       
 
       
        \\ xor %%rsi, %%rsi

     

       
11
       
 
       
        \\ xor %%rbx, %%rbx

     

       
12
       
 
       
        \\ mainloop:

     

       
13
       
 
       
        \\ xor %%rax, %%rax

     

       
14
       
 
       
        \\ delayloop:

     

       
15
       
 
       
        \\ inc %%rax

     

       
16
       
-
       
        \\ cmp $0x4000000, %%rax

     

       
17
       
 
       
        \\ jnz delayloop

     

       
18
       
 
       
        \\ inc %%rbx

     

       
0
       
 
       

     

       
19
       
 
       
        \\ syscall

     

       
20
       
 
       
        \\ jmp mainloop

     

       
0
       
 
       

     

       
0
       
 
       

     

       
21
       
 
       
    );

     

       
22
       
 
       


     

       
23
       
 
       
    die();

     

···

       
1
       
 
       
const std = @import("std");

     

       
2
       
 
       
const os = @import("os.zig");

     

       
3
       
+
       
const config = @import("config");

     

       
4
       
 
       


     

       
5
       
 
       
export fn _start() callconv(.c) noreturn {

     

       
6
       
+
       
    _ = os.syscall1(SYS_poke, 0xB16B00B5BADBABE);

     

       
7
       
+
       
    _ = os.syscall1(SYS_exit, 0x69696969);

     

       
8
       
 
       
    asm volatile ("int3");

     

       
9
       
 
       
    asm volatile (

     

       
10
       
+
       
        \\ mov %[number], %%rdi

     

       
11
       
 
       
        \\ xor %%rsi, %%rsi

     

       
12
       
 
       
        \\ xor %%rbx, %%rbx

     

       
13
       
 
       
        \\ mainloop:

     

       
14
       
 
       
        \\ xor %%rax, %%rax

     

       
15
       
 
       
        \\ delayloop:

     

       
16
       
 
       
        \\ inc %%rax

     

       
17
       
+
       
        \\ cmp $0x1000000, %%rax

     

       
18
       
 
       
        \\ jnz delayloop

     

       
19
       
 
       
        \\ inc %%rbx

     

       
20
       
+
       
        \\ mov %%rsp, %%rsi

     

       
21
       
 
       
        \\ syscall

     

       
22
       
 
       
        \\ jmp mainloop

     

       
23
       
+
       
        :

     

       
24
       
+
       
        : [number] "r" (config.number),

     

       
25
       
 
       
    );

     

       
26
       
 
       


     

       
27
       
 
       
    die();

     

···

       
67
       
 
       
            const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       
68
       
 
       
            const mod_size = mod.size;

     

       
69
       
 
       
            log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       
70
       
-
       
            common.init_data.root_task = mod_addr[0..mod_size];

     

       
71
       
 
       
        }

     

       
72
       
 
       
    } else {

     

       
73
       
 
       
        @branchHint(.unlikely);

     

···

       
67
       
 
       
            const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       
68
       
 
       
            const mod_size = mod.size;

     

       
69
       
 
       
            log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       
70
       
+
       
            common.init_data.root_task_elf = mod_addr[0..mod_size];

     

       
71
       
 
       
        }

     

       
72
       
 
       
    } else {

     

       
73
       
 
       
        @branchHint(.unlikely);

     

···

       
3
       
 
       
const arch = @import("root.zig");

     

       
4
       
 
       
const common = @import("common");

     

       
5
       
 
       
const console = @import("console");

     

       
6
       
-
       
const flanterm = @import("flanterm");

     

       
7
       
 
       
const log = std.log.scoped(.amd64_init);

     

       
8
       
 
       
const StandardGdt = arch.structures.gdt.StandardGdt;

     

       
9
       
 
       
const Tss = arch.structures.tss.Tss;

     

       
10
       
-
       


     

       
11
       
-
       
var pg_ctx: arch.mm.paging.Context = undefined;

     

       
12
       
 
       


     

       
13
       
 
       
pub const limine_requests = struct {

     

       
14
       
 
       
    export var start_marker: limine.RequestsStartMarker linksection(".limine_reqs_start") = .{};

     
···

       
24
       
 
       
    pub export var mp: limine.SmpMpFeature.MpRequest linksection(".limine_reqs") = .{ .flags = .{ .x2apic = true } };

     

       
25
       
 
       
};

     

       
26
       
 
       


     

       
27
       
-
       
pub fn bsp_init() callconv(.c) noreturn {

     

       
28
       
 
       
    // Don't optimize away the limine requests

     

       
29
       
 
       
    inline for (@typeInfo(limine_requests).@"struct".decls) |decl| {

     

       
30
       
 
       
        std.mem.doNotOptimizeAway(&@field(limine_requests, decl.name));

     
···

       
36
       
 
       
        arch.instructions.die();

     

       
37
       
 
       
    }

     

       
38
       
 
       


     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
39
       
 
       
    // Die if we don't have a memory map or Higher Half Direct Mapping

     

       
40
       
 
       
    if (limine_requests.memmap.response == null) {

     

       
41
       
 
       
        @branchHint(.cold);

     
···

       
49
       
 
       
    const hhdm_offset = limine_requests.hhdm.response.?.offset;

     

       
50
       
 
       
    common.init_data.hhdm_slide = hhdm_offset;

     

       
51
       
 
       


     

       
52
       
-
       
    // Add in a framebuffer if found

     

       
53
       
-
       
    initConsole();

     

       
54
       
-
       
    // Get basic information through CPUID

     

       
55
       
 
       
    arch.instructions.cpuid.init();

     

       
56
       
 
       


     

       
57
       
-
       
    // Add in ACPI/dtb if found, prefer ACPI

     

       
58
       
-
       
    initHwDesc();

     

       
59
       
-
       


     

       
60
       
-
       
    // Set up the temporary Physical Memory Allocator

     

       
61
       
-
       
    common.mm.bootmem.init();

     

       
62
       
-
       


     

       
63
       
-
       
    // Attach the root task

     

       
64
       
-
       
    if (limine_requests.modules.response) |module_response| {

     

       
65
       
-
       
        if (module_response.module_count > 0) {

     

       
66
       
-
       
            const mod = module_response.modules.?[0];

     

       
67
       
-
       
            const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       
68
       
-
       
            const mod_size = mod.size;

     

       
69
       
-
       
            log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       
70
       
-
       
            common.init_data.root_task = mod_addr[0..mod_size];

     

       
71
       
-
       
        }

     

       
72
       
-
       
    } else {

     

       
73
       
-
       
        @branchHint(.unlikely);

     

       
74
       
-
       
        @panic("No root task found!");

     

       
75
       
-
       
    }

     

       
76
       
 
       


     

       
77
       
-
       
    // Initialize per-cpu data (GDT and TSS)

     

       
0
       
 
       

     

       
78
       
 
       
    arch.per_cpu_init_data.init(limine_requests.mp.response.?.cpu_count);

     

       
79
       
-
       


     

       
80
       
-
       
    // Install the IDT

     

       
81
       
-
       
    arch.interrupts.idt.init();

     

       
82
       
 
       


     

       
83
       
 
       
    // Set up our own GDT and TSS

     

       
84
       
 
       
    const gdt = &arch.per_cpu_init_data.gdt_buf[0];

     

       
85
       
 
       
    gdt.* = .{};

     

       
86
       
 
       
    const tss = &arch.per_cpu_init_data.tss_buf[0];

     

       
87
       
-
       
    // TSS rsp 0x3800

     

       
88
       
 
       
    tss.* = .{

     

       
89
       
-
       
        .rsp0 = 0x7ffe_0000_8000,

     

       
90
       
-
       
        .rsp1 = 0x7ffe_0000_8000,

     

       
91
       
-
       
        .rsp2 = 0x7ffe_0000_8000,

     

       
92
       
 
       
    };

     

       
93
       
 
       


     

       
94
       
 
       
    gdt.tss_desc.set_tss_addr(tss);

     

       
95
       
 
       
    gdt.load();

     

       
96
       
-
       
    log.info("BSP successfully setup GDT+TSS!", .{});

     

       
97
       
-
       


     

       
98
       
-
       
    // AP bootstrap

     

       
99
       
-
       
    bootstrapAPs();

     

       
100
       
-
       


     

       
101
       
-
       
    // Calibrate our TSC

     

       
102
       
-
       
    arch.tsc.calibrate_pit() catch {

     

       
103
       
-
       
        log.info("Failed to calibrate with PIT!", .{});

     

       
104
       
-
       
        arch.instructions.die();

     

       
105
       
-
       
    };

     

       
106
       
-
       
    log.info("TSC estimate: {} MHz", .{arch.tsc.tsc_khz / 1000});

     

       
107
       
-
       


     

       
108
       
-
       
    log.info("Setting up scheduling...", .{});

     

       
109
       
 
       


     

       
110
       
-
       
    pg_ctx = arch.mm.paging.Context.get_current();

     

       
111
       
-
       


     

       
112
       
-
       
    initApic() catch |err| {

     

       
113
       
-
       
        log.err("Failed to set up APIC! {}", .{err});

     

       
114
       
-
       
        @panic("apic");

     

       
115
       
-
       
    };

     

       
116
       
-
       


     

       
117
       
-
       
    log.info("Allocating code for userspace...", .{});

     

       
118
       
-
       


     

       
119
       
-
       
    // Allocate a stack (0x3000 - 0x4000)

     

       
120
       
-
       
    common.mm.paging.map(.{

     

       
121
       
-
       
        .vaddr = 0x7ffe_0000_0000,

     

       
122
       
-
       
        .size = 65536,

     

       
123
       
-
       
        .memory_type = .MemoryWriteBack,

     

       
124
       
-
       
        .perms = .{

     

       
125
       
-
       
            .x = false,

     

       
126
       
-
       
            .u = true,

     

       
127
       
-
       
            .w = true,

     

       
128
       
-
       
        },

     

       
129
       
-
       
        .context = &pg_ctx,

     

       
130
       
-
       
    }) catch @panic("couldn't map user stack");

     

       
131
       
-
       


     

       
132
       
-
       
    const entry = common.loadRootTask(&pg_ctx) catch |err| {

     

       
133
       
-
       
        log.err("Couldn't load the root task! {}", .{err});

     

       
134
       
-
       
        @panic("ggz");

     

       
135
       
-
       
    };

     

       
136
       
-
       
    log.info("Dropping to userspace entry 0x{x:0>16}", .{entry});

     

       
137
       
-
       


     

       
138
       
-
       
    init_syscalls();

     

       
139
       
-
       


     

       
140
       
-
       
    arch.interrupts.apic.armTimer(1000);

     

       
141
       
-
       
    enter_userspace(entry, 0x69, 0x7ffe_0001_0000);

     

       
142
       
-
       
}

     

       
143
       
-
       


     

       
144
       
-
       
// Get ready for system calls (set MSRs)

     

       
145
       
-
       
fn init_syscalls() void {

     

       
146
       
-
       
    // Set up the STAR MSR with the segment descriptors

     

       
147
       
-
       
    const IA32_STAR = arch.registers.MSR(u64, 0xC0000081);

     

       
148
       
-
       
    const star_value: u64 = 0 | @as(u64, arch.structures.gdt.StandardGdt.selectors.kernel_code) << 32 | (@as(u64, arch.structures.gdt.StandardGdt.selectors.tss_desc + 8) | 3) << 48;

     

       
149
       
-
       
    IA32_STAR.write(star_value);

     

       
150
       
-
       


     

       
151
       
-
       
    // Set up the EFER MSR with SCE (System Call Enable)

     

       
152
       
-
       
    const IA32_EFER = arch.registers.MSR(u64, 0xC0000080);

     

       
153
       
-
       
    const efer_val = IA32_EFER.read() | 0b1;

     

       
154
       
-
       
    IA32_EFER.write(efer_val);

     

       
155
       
-
       


     

       
156
       
-
       
    // Set up LSTAR with the syscall handler and FMASK to clear interrupts

     

       
157
       
-
       
    const IA32_LSTAR = arch.registers.MSR(u64, 0xC0000082);

     

       
158
       
-
       
    IA32_LSTAR.write(@intFromPtr(syscall_entry));

     

       
159
       
-
       


     

       
160
       
-
       
    const IA32_FMASK = arch.registers.MSR(u64, 0xC0000084);

     

       
161
       
-
       
    IA32_FMASK.write(1 << 9);

     

       
162
       
-
       
}

     

       
163
       
-
       


     

       
164
       
-
       
const syscall_entry = @extern(*anyopaque, .{

     

       
165
       
-
       
    .name = "syscall_entry",

     

       
166
       
-
       
});

     

       
167
       
-
       
export fn syscall_handler(rdi: usize, rsi: usize) callconv(.c) void {

     

       
168
       
-
       
    std.log.info("Got a syscall! rdi=0x{x}, rsi=0x{x}", .{ rdi, rsi });

     

       
169
       
-
       
}

     

       
170
       
-
       


     

       
171
       
-
       
fn enter_userspace(entry: u64, arg: u64, stack: u64) noreturn {

     

       
172
       
-
       
    log.info("usercode64 GDT 0x{x}, userdata64 GDT 0x{x}", .{ arch.structures.gdt.StandardGdt.selectors.user_code, arch.structures.gdt.StandardGdt.selectors.user_data });

     

       
173
       
-
       
    const cr3 = arch.registers.ControlRegisters.Cr3.read();

     

       
174
       
-
       
    arch.registers.ControlRegisters.Cr3.write(cr3);

     

       
175
       
-
       
    asm volatile (

     

       
176
       
-
       
        \\ push %[userdata64]

     

       
177
       
-
       
        \\ push %[stack]

     

       
178
       
-
       
        \\ push $0x202

     

       
179
       
-
       
        \\ push %[usercode64]

     

       
180
       
-
       
        \\ push %[entry]

     

       
181
       
-
       
        \\

     

       
182
       
-
       
        \\ mov %[userdata64], %%rax

     

       
183
       
-
       
        \\ mov %%rax, %%es

     

       
184
       
-
       
        \\ mov %%rax, %%ds

     

       
185
       
-
       
        \\

     

       
186
       
-
       
        \\ xor %%rsi, %%rsi

     

       
187
       
-
       
        \\ xor %%rax, %%rax

     

       
188
       
-
       
        \\ xor %%rdx, %%rdx

     

       
189
       
-
       
        \\ xor %%rcx, %%rcx

     

       
190
       
-
       
        \\ xor %%rbp, %%rbp

     

       
191
       
-
       
        \\ xor %%rbx, %%rbx

     

       
192
       
-
       
        \\

     

       
193
       
-
       
        \\ xor %%r8, %%r8

     

       
194
       
-
       
        \\ xor %%r9, %%r9

     

       
195
       
-
       
        \\ xor %%r10, %%r10

     

       
196
       
-
       
        \\ xor %%r11, %%r11

     

       
197
       
-
       
        \\ xor %%r12, %%r12

     

       
198
       
-
       
        \\ xor %%r13, %%r13

     

       
199
       
-
       
        \\ xor %%r14, %%r14

     

       
200
       
-
       
        \\ xor %%r15, %%r15

     

       
201
       
-
       
        \\

     

       
202
       
-
       
        \\ iretq

     

       
203
       
-
       
        \\

     

       
204
       
-
       
        :

     

       
205
       
-
       
        : [arg] "{rdi}" (arg),

     

       
206
       
-
       
          [stack] "r" (stack),

     

       
207
       
-
       
          [entry] "r" (entry),

     

       
208
       
-
       
          [userdata64] "i" (arch.structures.gdt.StandardGdt.selectors.user_data),

     

       
209
       
-
       
          [usercode64] "i" (arch.structures.gdt.StandardGdt.selectors.user_code),

     

       
210
       
-
       
    );

     

       
211
       
-
       
    unreachable;

     

       
212
       
-
       
}

     

       
213
       
-
       


     

       
214
       
-
       
fn initApic() !void {

     

       
215
       
-
       
    const has_x2apic = limine_requests.mp.response.?.flags.x2apic;

     

       
216
       
-
       
    arch.interrupts.apic.singleton = switch (has_x2apic) {

     

       
217
       
-
       
        true => .x2apic,

     

       
218
       
-
       
        false => blk: {

     

       
219
       
-
       
            // Map the APIC first!

     

       
220
       
-
       
            const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       
221
       
-
       
            try common.mm.paging.mapPhys(.{

     

       
222
       
-
       
                .vaddr = @intFromPtr(apic_base),

     

       
223
       
-
       
                .paddr = 0xFEE0_0000,

     

       
224
       
-
       
                .size = 0x1000,

     

       
225
       
-
       
                .memory_type = .DeviceUncacheable,

     

       
226
       
-
       
                .perms = .{

     

       
227
       
-
       
                    .x = false,

     

       
228
       
-
       
                    .u = false,

     

       
229
       
-
       
                    .w = true,

     

       
230
       
-
       
                },

     

       
231
       
-
       
                .context = &pg_ctx,

     

       
232
       
-
       
            });

     

       
233
       
-
       
            break :blk .{ .xapic = apic_base };

     

       
234
       
-
       
        },

     

       
235
       
-
       
    };

     

       
236
       
-
       
    // Set up the spurious vector and the TPR

     

       
237
       
-
       
    arch.interrupts.apic.init.initialSetup();

     

       
238
       
-
       


     

       
239
       
-
       
    // Calibrate the APIC timer

     

       
240
       
-
       
    arch.interrupts.apic.init.calibrateTimer();

     

       
241
       
-
       


     

       
242
       
-
       
    // Enable one-shot interrupts

     

       
243
       
-
       
    arch.interrupts.apic.init.enableOneshotInterrupt();

     

       
244
       
-
       
}

     

       
245
       
-
       


     

       
246
       
-
       
fn initConsole() void {

     

       
247
       
 
       
    if (limine_requests.framebuffer.response) |fb_response| {

     

       
248
       
 
       
        if (fb_response.framebuffer_count > 0) {

     

       
249
       
-
       
            const fb = common.aux.Framebuffer.from_limine(fb_response.getFramebuffers()[0]);

     

       
250
       
-
       
            common.init_data.framebuffer = fb;

     

       
251
       
-
       


     

       
252
       
-
       
            common.init_data.console = flanterm.Context.init(.{

     

       
253
       
-
       
                .fb = fb.address,

     

       
254
       
 
       
                .width = fb.width,

     

       
255
       
 
       
                .height = fb.height,

     

       
256
       
 
       
                .pitch = fb.pitch,

     
···

       
260
       
 
       
                .green_mask_shift = fb.green_mask_shift,

     

       
261
       
 
       
                .blue_mask_size = fb.blue_mask_size,

     

       
262
       
 
       
                .blue_mask_shift = fb.blue_mask_shift,

     

       
263
       
-
       
            });

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
264
       
 
       
        }

     

       
265
       
 
       
    }

     

       
266
       
 
       
}

     

···

       
3
       
 
       
const arch = @import("root.zig");

     

       
4
       
 
       
const common = @import("common");

     

       
5
       
 
       
const console = @import("console");

     

       
0
       
 
       

     

       
6
       
 
       
const log = std.log.scoped(.amd64_init);

     

       
7
       
 
       
const StandardGdt = arch.structures.gdt.StandardGdt;

     

       
8
       
 
       
const Tss = arch.structures.tss.Tss;

     

       
0
       
 
       

     

       
0
       
 
       

     

       
9
       
 
       


     

       
10
       
 
       
pub const limine_requests = struct {

     

       
11
       
 
       
    export var start_marker: limine.RequestsStartMarker linksection(".limine_reqs_start") = .{};

     
···

       
21
       
 
       
    pub export var mp: limine.SmpMpFeature.MpRequest linksection(".limine_reqs") = .{ .flags = .{ .x2apic = true } };

     

       
22
       
 
       
};

     

       
23
       
 
       


     

       
24
       
+
       
pub fn early_init() void {

     

       
25
       
 
       
    // Don't optimize away the limine requests

     

       
26
       
 
       
    inline for (@typeInfo(limine_requests).@"struct".decls) |decl| {

     

       
27
       
 
       
        std.mem.doNotOptimizeAway(&@field(limine_requests, decl.name));

     
···

       
33
       
 
       
        arch.instructions.die();

     

       
34
       
 
       
    }

     

       
35
       
 
       


     

       
36
       
+
       
    // If the base revision isn't supported, we can't boot

     

       
37
       
+
       
    if (!limine_requests.base_revision.isSupported()) {

     

       
38
       
+
       
        @branchHint(.cold);

     

       
39
       
+
       
        arch.instructions.die();

     

       
40
       
+
       
    }

     

       
41
       
+
       


     

       
42
       
 
       
    // Die if we don't have a memory map or Higher Half Direct Mapping

     

       
43
       
 
       
    if (limine_requests.memmap.response == null) {

     

       
44
       
 
       
        @branchHint(.cold);

     
···

       
52
       
 
       
    const hhdm_offset = limine_requests.hhdm.response.?.offset;

     

       
53
       
 
       
    common.init_data.hhdm_slide = hhdm_offset;

     

       
54
       
 
       


     

       
55
       
+
       
    // Get CPUID info

     

       
0
       
 
       

     

       
0
       
 
       

     

       
56
       
 
       
    arch.instructions.cpuid.init();

     

       
57
       
 
       


     

       
58
       
+
       
    // Set up the kernel paging context

     

       
59
       
+
       
    common.init_data.kernel_paging_ctx = arch.mm.paging.Context.get_current();

     

       
60
       
+
       
}

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
61
       
 
       


     

       
62
       
+
       
pub fn bsp_init() void {

     

       
63
       
+
       
    // Set up per-cpu data

     

       
64
       
 
       
    arch.per_cpu_init_data.init(limine_requests.mp.response.?.cpu_count);

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
65
       
 
       


     

       
66
       
 
       
    // Set up our own GDT and TSS

     

       
67
       
 
       
    const gdt = &arch.per_cpu_init_data.gdt_buf[0];

     

       
68
       
 
       
    gdt.* = .{};

     

       
69
       
 
       
    const tss = &arch.per_cpu_init_data.tss_buf[0];

     

       
70
       
+
       
    // TODO: create a fixed mapping for the pages maybe?

     

       
71
       
 
       
    tss.* = .{

     

       
72
       
+
       
        .rsp0 = common.init_data.hhdm_slide + arch.per_cpu_init_data.getStackPhys(0),

     

       
0
       
 
       

     

       
0
       
 
       

     

       
73
       
 
       
    };

     

       
74
       
 
       


     

       
75
       
 
       
    gdt.tss_desc.set_tss_addr(tss);

     

       
76
       
 
       
    gdt.load();

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
77
       
 
       


     

       
78
       
+
       
    // Add in the framebuffer

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
79
       
 
       
    if (limine_requests.framebuffer.response) |fb_response| {

     

       
80
       
 
       
        if (fb_response.framebuffer_count > 0) {

     

       
81
       
+
       
            const fb = fb_response.getFramebuffers()[0];

     

       
82
       
+
       
            common.init_data.framebuffer = .{

     

       
83
       
+
       
                .address = @ptrCast(@alignCast(fb.address)),

     

       
0
       
 
       

     

       
0
       
 
       

     

       
84
       
 
       
                .width = fb.width,

     

       
85
       
 
       
                .height = fb.height,

     

       
86
       
 
       
                .pitch = fb.pitch,

     
···

       
90
       
 
       
                .green_mask_shift = fb.green_mask_shift,

     

       
91
       
 
       
                .blue_mask_size = fb.blue_mask_size,

     

       
92
       
 
       
                .blue_mask_shift = fb.blue_mask_shift,

     

       
93
       
+
       
                .bypp = fb.bpp / 8,

     

       
94
       
+
       
            };

     

       
95
       
+
       
        }

     

       
96
       
+
       
    }

     

       
97
       
+
       


     

       
98
       
+
       
    // Add in ACPI/dtb if found, prefer ACPI

     

       
99
       
+
       
    initHwDesc();

     

       
100
       
+
       


     

       
101
       
+
       
    // Attach the root task

     

       
102
       
+
       
    if (limine_requests.modules.response) |module_response| {

     

       
103
       
+
       
        if (module_response.module_count > 0) {

     

       
104
       
+
       
            const mod = module_response.modules.?[0];

     

       
105
       
+
       
            const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       
106
       
+
       
            const mod_size = mod.size;

     

       
107
       
+
       
            log.info("Loading root task with {s} @ {*}", .{ mod.path, mod.address });

     

       
108
       
+
       
            common.init_data.root_task_elf = mod_addr[0..mod_size];

     

       
109
       
+
       
        }

     

       
110
       
+
       
    } else {

     

       
111
       
+
       
        @branchHint(.unlikely);

     

       
112
       
+
       
        @panic("No root task found!");

     

       
113
       
+
       
    }

     

       
114
       
+
       


     

       
115
       
+
       
    bootstrapAPs();

     

       
116
       
+
       
}

     

       
117
       
+
       


     

       
118
       
+
       
pub fn loadTasks() void {

     

       
119
       
+
       
    const tasks_buf: [*]arch.structures.Task = @ptrFromInt(common.init_data.bootmem.allocMem(std.heap.pageSize()) catch {

     

       
120
       
+
       
        std.log.err("Couldn't allocate tasks!", .{});

     

       
121
       
+
       
        @panic("allocPhys");

     

       
122
       
+
       
    });

     

       
123
       
+
       
    const tasks_scratch: []arch.structures.Task = tasks_buf[0 .. std.heap.pageSize() / @sizeOf(arch.structures.Task)];

     

       
124
       
+
       


     

       
125
       
+
       
    if (limine_requests.modules.response) |module_response| {

     

       
126
       
+
       
        if (module_response.module_count > 0) {

     

       
127
       
+
       
            for (module_response.modules.?[0..module_response.module_count], 0..) |mod, i| {

     

       
128
       
+
       
                const mod_addr: [*]align(4096) u8 = @ptrCast(mod.address);

     

       
129
       
+
       
                const mod_size = mod.size;

     

       
130
       
+
       
                common.loadTask(&tasks_scratch[i], mod_addr[0..mod_size]);

     

       
131
       
+
       
            }

     

       
132
       
 
       
        }

     

       
133
       
 
       
    }

     

       
134
       
 
       
}

     

···

       
21
       
 
       
    const res = cpuid(1, 0);

     

       
22
       
 
       
    const feat_ecx: FeaturesEcx = @bitCast(res.ecx);

     

       
23
       
 
       
    arch.interrupts.apic.tsc_deadline_available = feat_ecx.tsc_deadline;

     

       
0
       
 
       

     

       
24
       
 
       
}

     

       
25
       
 
       


     

       
26
       
 
       
const FeaturesEcx = packed struct(u32) {

     

       
27
       
-
       
    _reserved0: u23,

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
28
       
 
       
    tsc_deadline: bool,

     

       
29
       
-
       
    _reserved1: u8,

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
30
       
 
       
};

     

       
31
       
 
       


     

       
32
       
 
       
pub inline fn cpuid(leaf: u32, sub: u32) DefaultResults {

     

···

       
21
       
 
       
    const res = cpuid(1, 0);

     

       
22
       
 
       
    const feat_ecx: FeaturesEcx = @bitCast(res.ecx);

     

       
23
       
 
       
    arch.interrupts.apic.tsc_deadline_available = feat_ecx.tsc_deadline;

     

       
24
       
+
       
    arch.interrupts.apic.has_x2apic = feat_ecx.x2apic;

     

       
25
       
 
       
}

     

       
26
       
 
       


     

       
27
       
 
       
const FeaturesEcx = packed struct(u32) {

     

       
28
       
+
       
    sse3: bool,

     

       
29
       
+
       
    pclmulqdq: bool,

     

       
30
       
+
       
    dtes64: bool,

     

       
31
       
+
       
    monitor: bool,

     

       
32
       
+
       
    ds_cpl: bool,

     

       
33
       
+
       
    vmx: bool,

     

       
34
       
+
       
    smx: bool,

     

       
35
       
+
       
    est: bool,

     

       
36
       
+
       
    tm2: bool,

     

       
37
       
+
       
    ssse3: bool,

     

       
38
       
+
       
    cnxt_id: bool,

     

       
39
       
+
       
    sdbg: bool,

     

       
40
       
+
       
    fma: bool,

     

       
41
       
+
       
    cx16: bool,

     

       
42
       
+
       
    xtpr: bool,

     

       
43
       
+
       
    pdcm: bool,

     

       
44
       
+
       
    _reserved0: bool,

     

       
45
       
+
       
    pcid: bool,

     

       
46
       
+
       
    dca: bool,

     

       
47
       
+
       
    sse4_1: bool,

     

       
48
       
+
       
    sse4_2: bool,

     

       
49
       
+
       
    x2apic: bool,

     

       
50
       
+
       
    movbe: bool,

     

       
51
       
+
       
    popcnt: bool,

     

       
52
       
 
       
    tsc_deadline: bool,

     

       
53
       
+
       
    aesni: bool,

     

       
54
       
+
       
    xsave: bool,

     

       
55
       
+
       
    osxsave: bool,

     

       
56
       
+
       
    avx: bool,

     

       
57
       
+
       
    f16c: bool,

     

       
58
       
+
       
    rdrand: bool,

     

       
59
       
+
       
    hypervisor: bool,

     

       
60
       
 
       
};

     

       
61
       
 
       


     

       
62
       
 
       
pub inline fn cpuid(leaf: u32, sub: u32) DefaultResults {

     

···

       
1
       
 
       
pub const cpuid = @import("cpuid.zig");

     

       
2
       
 
       


     

       
3
       
 
       
pub inline fn die() noreturn {

     

       
4
       
-
       
    while (true) {

     

       
5
       
-
       
        asm volatile ("hlt");

     

       
6
       
-
       
    }

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
7
       
 
       
}

     

···

       
1
       
 
       
pub const cpuid = @import("cpuid.zig");

     

       
2
       
 
       


     

       
3
       
 
       
pub inline fn die() noreturn {

     

       
4
       
+
       
    asm volatile (

     

       
5
       
+
       
        \\ mov $0xDEADDEADDEADDEAD, %%rax

     

       
6
       
+
       
        \\ 1: hlt

     

       
7
       
+
       
        \\ jmp 1b

     

       
8
       
+
       
    );

     

       
9
       
+
       
    unreachable;

     

       
10
       
 
       
}

     

···

       
1
       
 
       
const std = @import("std");

     

       
2
       
 
       
const arch = @import("../root.zig");

     

       
0
       
 
       

     

       
3
       
 
       
const log = std.log.scoped(.apic);

     

       
0
       
 
       

     

       
4
       
 
       


     

       
5
       
 
       
pub var lapic_timer_khz: usize = 0;

     

       
6
       
 
       
pub var tsc_deadline_available = false;

     

       
0
       
 
       

     

       
7
       
 
       


     

       
8
       
 
       
// tbh every cpu will be either x2apic or not, and if xapic it will

     

       
9
       
 
       
// have the exact same base address anyways so this is fine

     
···

       
225
       
 
       
};

     

       
226
       
 
       


     

       
227
       
 
       
pub const init = struct {

     

       
228
       
-
       
    // Get the APIC ready (call first)

     

       
229
       
 
       
    pub fn initialSetup() void {

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
230
       
 
       
        singleton.setSpuriousInterruptRegister(.{

     

       
231
       
 
       
            .apic_soft_enable = true,

     

       
232
       
 
       
            .idt_entry = 0xFF,

     
···

       
235
       
 
       
        //     .priority_class = 0,

     

       
236
       
 
       
        //     .priority_sub_class = 0,

     

       
237
       
 
       
        // });

     

       
238
       
-
       
        arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, spurious_interrupt_handler, 3, 0);

     

       
239
       
-
       
        arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, periodic_handler, 3, 0);

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
240
       
 
       
    }

     

       
241
       
 
       


     

       
242
       
-
       
    pub fn calibrateTimer() void {

     

       
243
       
 
       
        singleton.setDivideConfigurationRegister(.div2);

     

       
244
       
 
       
        singleton.setLVTTimerRegister(.{

     

       
245
       
 
       
            .idt_entry = 0x69,

     
···

       
275
       
 
       


     

       
276
       
 
       
        lapic_timer_khz = norm / 5;

     

       
277
       
 
       


     

       
278
       
-
       
        log.debug("APIC timer: {} kHz", .{lapic_timer_khz});

     

       
279
       
 
       
    }

     

       
280
       
 
       


     

       
281
       
-
       
    pub fn enableOneshotInterrupt() void {

     

       
282
       
 
       
        const mode: LAPIC.LVTTimerRegister.Mode = switch (tsc_deadline_available) {

     

       
283
       
 
       
            true => .tsc_deadline,

     

       
284
       
 
       
            false => blk: {

     
···

       
310
       
 
       
    }

     

       
311
       
 
       
}

     

       
312
       
 
       


     

       
313
       
-
       
pub fn spurious_interrupt_handler(_: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
314
       
 
       
    log.warn("Got a spurious interrupt!", .{});

     

       
315
       
 
       
}

     

       
316
       
 
       


     

       
317
       
-
       
pub fn periodic_handler(stack_trace: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
318
       
-
       
    log.warn("Got an APIC timer interrupt, incrementing user's rsi...", .{});

     

       
319
       
-
       
    stack_trace.regs.rsi += 1;

     

       
320
       
-
       
    singleton.setRegister(.eoi, 0);

     

       
321
       
-
       
    armTimer(1000);

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
322
       
 
       
}

     

···

       
1
       
 
       
const std = @import("std");

     

       
2
       
 
       
const arch = @import("../root.zig");

     

       
3
       
+
       
const idt = arch.interrupts.idt;

     

       
4
       
 
       
const log = std.log.scoped(.apic);

     

       
5
       
+
       
const common = @import("common");

     

       
6
       
 
       


     

       
7
       
 
       
pub var lapic_timer_khz: usize = 0;

     

       
8
       
 
       
pub var tsc_deadline_available = false;

     

       
9
       
+
       
pub var has_x2apic: bool = false;

     

       
10
       
 
       


     

       
11
       
 
       
// tbh every cpu will be either x2apic or not, and if xapic it will

     

       
12
       
 
       
// have the exact same base address anyways so this is fine

     
···

       
228
       
 
       
};

     

       
229
       
 
       


     

       
230
       
 
       
pub const init = struct {

     

       
0
       
 
       

     

       
231
       
 
       
    pub fn initialSetup() void {

     

       
232
       
+
       
        // First, make the APIC accessible

     

       
233
       
+
       
        initSingleton() catch |err| {

     

       
234
       
+
       
            log.err("Failed to map APIC! {}", .{err});

     

       
235
       
+
       
            @panic("initSingleton");

     

       
236
       
+
       
        };

     

       
237
       
+
       
        // Set up the interrupt handlers

     

       
238
       
 
       
        singleton.setSpuriousInterruptRegister(.{

     

       
239
       
 
       
            .apic_soft_enable = true,

     

       
240
       
 
       
            .idt_entry = 0xFF,

     
···

       
243
       
 
       
        //     .priority_class = 0,

     

       
244
       
 
       
        //     .priority_sub_class = 0,

     

       
245
       
 
       
        // });

     

       
246
       
+
       
        arch.interrupts.idt.add_handler(.{ .interrupt = 0xFF }, u64, spurious_interrupt_handler, 0, 0);

     

       
247
       
+
       
        arch.interrupts.idt.add_handler(.{ .interrupt = 48 }, u64, timer_handler, 0, 0);

     

       
248
       
+
       


     

       
249
       
+
       
        // Calibrate against the TSC

     

       
250
       
+
       
        calibrateTimer();

     

       
251
       
+
       
        // Set up the LVT Timer Register

     

       
252
       
+
       
        enableOneshotInterrupt();

     

       
253
       
+
       
    }

     

       
254
       
+
       


     

       
255
       
+
       
    fn initSingleton() !void {

     

       
256
       
+
       
        arch.interrupts.apic.singleton = switch (has_x2apic) {

     

       
257
       
+
       
            true => .x2apic,

     

       
258
       
+
       
            false => blk: {

     

       
259
       
+
       
                // Map the APIC first!

     

       
260
       
+
       
                const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       
261
       
+
       
                try common.mm.paging.mapPhys(.{

     

       
262
       
+
       
                    .vaddr = @intFromPtr(apic_base),

     

       
263
       
+
       
                    .paddr = 0xFEE0_0000,

     

       
264
       
+
       
                    .size = 0x1000,

     

       
265
       
+
       
                    .memory_type = .DeviceUncacheable,

     

       
266
       
+
       
                    .perms = .{

     

       
267
       
+
       
                        .x = false,

     

       
268
       
+
       
                        .u = false,

     

       
269
       
+
       
                        .w = true,

     

       
270
       
+
       
                    },

     

       
271
       
+
       
                });

     

       
272
       
+
       
                break :blk .{ .xapic = apic_base };

     

       
273
       
+
       
            },

     

       
274
       
+
       
        };

     

       
275
       
 
       
    }

     

       
276
       
 
       


     

       
277
       
+
       
    fn calibrateTimer() void {

     

       
278
       
 
       
        singleton.setDivideConfigurationRegister(.div2);

     

       
279
       
 
       
        singleton.setLVTTimerRegister(.{

     

       
280
       
 
       
            .idt_entry = 0x69,

     
···

       
310
       
 
       


     

       
311
       
 
       
        lapic_timer_khz = norm / 5;

     

       
312
       
 
       


     

       
313
       
+
       
        log.debug("timer: {} kHz", .{lapic_timer_khz});

     

       
314
       
 
       
    }

     

       
315
       
 
       


     

       
316
       
+
       
    fn enableOneshotInterrupt() void {

     

       
317
       
 
       
        const mode: LAPIC.LVTTimerRegister.Mode = switch (tsc_deadline_available) {

     

       
318
       
 
       
            true => .tsc_deadline,

     

       
319
       
 
       
            false => blk: {

     
···

       
345
       
 
       
    }

     

       
346
       
 
       
}

     

       
347
       
 
       


     

       
348
       
+
       
pub fn spurious_interrupt_handler(_: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
349
       
 
       
    log.warn("Got a spurious interrupt!", .{});

     

       
350
       
 
       
}

     

       
351
       
 
       


     

       
352
       
+
       
pub fn timer_handler(stack_trace: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
353
       
+
       
    defer {

     

       
354
       
+
       
        singleton.setRegister(.eoi, 0);

     

       
355
       
+
       
        armTimer(20);

     

       
356
       
+
       
    }

     

       
357
       
+
       
    // 1. Get the next task. If there is no next task, just keep scheduling.

     

       
358
       
+
       
    const task = common.scheduler.getNextTask() orelse return;

     

       
359
       
+
       
    // 2. Swap the next task state with the current interrupt trace

     

       
360
       
+
       
    std.mem.swap(arch.interrupts.idt.SavedRegisters, &task.regs, &stack_trace.regs);

     

       
361
       
+
       
    std.mem.swap(u64, &task.rip, &stack_trace.rip);

     

       
362
       
+
       
    std.mem.swap(u64, &task.rsp, &stack_trace.rsp);

     

       
363
       
+
       
    // If task has a new cr3, swap current CR3 and task cr3 too

     

       
364
       
+
       
    if (task.cr3_val != stack_trace.cr3) {

     

       
365
       
+
       
        arch.registers.ControlRegisters.Cr3.write(task.cr3_val);

     

       
366
       
+
       
        task.cr3_val = stack_trace.cr3;

     

       
367
       
+
       
    }

     

       
368
       
+
       
    // 3. Now, `task` has our current state, so enqueue it.

     

       
369
       
+
       
    common.scheduler.pushTask(task);

     

       
370
       
 
       
}

     

···

       
12
       
 
       
// handler, which pushes more information then calls the user

     

       
13
       
 
       
// defined handler. Use common sense and don't return from an exception

     

       
14
       
 
       
// which shouldn't be returned from.

     

       
15
       
-
       
const DefinedHandler = *const fn (*InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void;

     

       
16
       
-
       
pub export var defined_handlers: [entry_count]DefinedHandler = undefined;

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
17
       
 
       


     

       
18
       
 
       
// The actual handlers with addresses in the IDT.

     

       
19
       
 
       
const ActualHandler = *const fn () callconv(.naked) void;

     
···

       
172
       
 
       
    const Self = @This();

     

       
173
       
 
       
    pub fn parse(self: Self) Target {

     

       
174
       
 
       
        return switch (self.interrupt) {

     

       
175
       
-
       
            true => .{ .interrupt = @enumFromInt(self.idx) },

     

       
176
       
 
       
            false => switch (self.type) {

     

       
177
       
 
       
                .gdt => .{ .gdt_sel = self.idx },

     

       
178
       
 
       
                .ldt => .{ .ldt_sel = self.idx },

     
···

       
247
       
 
       
    r13: u64,

     

       
248
       
 
       
    r14: u64,

     

       
249
       
 
       
    r15: u64,

     

       
0
       
 
       

     

       
0
       
 
       

     

       
250
       
 
       
};

     

       
251
       
 
       


     

       
252
       
 
       
/// The Interrupt frame which we help generate

     
···

       
268
       
 
       
        eflags: u64,

     

       
269
       
 
       
        rsp: u64,

     

       
270
       
 
       
        ss: u16 align(8),

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
271
       
 
       
    };

     

       
272
       
 
       
}

     

       
273
       
 
       


     
···

       
276
       
 
       
    // Set every IDT entry to the corresponding ActualHandler

     

       
277
       
 
       
    for (0..entry_count) |i| {

     

       
278
       
 
       
        const actual_handler = @intFromPtr(actual_handlers[i]);

     

       
279
       
-
       
        interrupt_descriptor_table[i] = Entry.init(actual_handler, 3, 0);

     

       
280
       
 
       
    }

     

       
281
       
 
       
    // Now, set every defined handler to the default one

     

       
282
       
 
       
    @memset(&defined_handlers, arch.interrupts.unhandled_interrupt);

     

       
283
       
 
       


     

       
284
       
 
       
    // Finally, load the idt

     

       
285
       
 
       
    load();

     

       
286
       
-
       


     

       
287
       
-
       
    add_handler(.{ .exception = .breakpoint }, arch.interrupts.breakpoint, 3, 0);

     

       
288
       
-
       
    add_handler(.{ .exception = .double_fault }, arch.interrupts.double_fault, 3, 0);

     

       
289
       
-
       
    add_handler(.{ .exception = .general_protection_fault }, arch.interrupts.general_protection_fault, 3, 0);

     

       
290
       
-
       
    add_handler(.{ .exception = .page_fault }, arch.mm.paging.page_fault_handler, 3, 0);

     

       
291
       
 
       
}

     

       
292
       
 
       


     

       
293
       
 
       
pub fn load() void {

     
···

       
298
       
 
       
    idtr.load();

     

       
299
       
 
       
}

     

       
300
       
 
       


     

       
301
       
-
       
pub fn add_handler(interrupt: Interrupt, handler: anytype, dpl: u2, ist: u3) void {

     

       
302
       
 
       
    // Modify the type, dpl, and ist in place

     

       
303
       
 
       
    var tmp = interrupt_descriptor_table[interrupt.interrupt];

     

       
304
       
 
       
    tmp.options.dpl = dpl;

     

       
305
       
 
       
    tmp.options.ist_index = ist;

     

       
306
       
 
       
    interrupt_descriptor_table[interrupt.interrupt] = tmp;

     

       
307
       
 
       


     

       
308
       
-
       
    // Add the DefinedHandler

     

       
309
       
-
       
    defined_handlers[interrupt.interrupt] = @ptrCast(&handler);

     

       
310
       
 
       
}

     

···

       
12
       
 
       
// handler, which pushes more information then calls the user

     

       
13
       
 
       
// defined handler. Use common sense and don't return from an exception

     

       
14
       
 
       
// which shouldn't be returned from.

     

       
15
       
+
       
pub const CallConv: std.builtin.CallingConvention = .{ .x86_64_sysv = .{} };

     

       
16
       
+
       
pub fn InterruptHandler(comptime E: type) type {

     

       
17
       
+
       
    return *const fn (*InterruptFrame(E)) callconv(CallConv) void;

     

       
18
       
+
       
}

     

       
19
       
+
       
pub export var defined_handlers: [entry_count]InterruptHandler(u64) = undefined;

     

       
20
       
 
       


     

       
21
       
 
       
// The actual handlers with addresses in the IDT.

     

       
22
       
 
       
const ActualHandler = *const fn () callconv(.naked) void;

     
···

       
175
       
 
       
    const Self = @This();

     

       
176
       
 
       
    pub fn parse(self: Self) Target {

     

       
177
       
 
       
        return switch (self.interrupt) {

     

       
178
       
+
       
            true => .{ .interrupt = .{ .interrupt = @truncate(self.idx) } },

     

       
179
       
 
       
            false => switch (self.type) {

     

       
180
       
 
       
                .gdt => .{ .gdt_sel = self.idx },

     

       
181
       
 
       
                .ldt => .{ .ldt_sel = self.idx },

     
···

       
250
       
 
       
    r13: u64,

     

       
251
       
 
       
    r14: u64,

     

       
252
       
 
       
    r15: u64,

     

       
253
       
+
       


     

       
254
       
+
       
    pub const default = std.mem.zeroes(SavedRegisters);

     

       
255
       
 
       
};

     

       
256
       
 
       


     

       
257
       
 
       
/// The Interrupt frame which we help generate

     
···

       
273
       
 
       
        eflags: u64,

     

       
274
       
 
       
        rsp: u64,

     

       
275
       
 
       
        ss: u16 align(8),

     

       
276
       
+
       


     

       
277
       
+
       
        pub fn normalize(self: *InterruptFrame(ErrorCode)) *InterruptFrame(u64) {

     

       
278
       
+
       
            return @ptrCast(self);

     

       
279
       
+
       
        }

     

       
280
       
 
       
    };

     

       
281
       
 
       
}

     

       
282
       
 
       


     
···

       
285
       
 
       
    // Set every IDT entry to the corresponding ActualHandler

     

       
286
       
 
       
    for (0..entry_count) |i| {

     

       
287
       
 
       
        const actual_handler = @intFromPtr(actual_handlers[i]);

     

       
288
       
+
       
        interrupt_descriptor_table[i] = Entry.init(actual_handler, 0, 0);

     

       
289
       
 
       
    }

     

       
290
       
 
       
    // Now, set every defined handler to the default one

     

       
291
       
 
       
    @memset(&defined_handlers, arch.interrupts.unhandled_interrupt);

     

       
292
       
 
       


     

       
293
       
 
       
    // Finally, load the idt

     

       
294
       
 
       
    load();

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
295
       
 
       
}

     

       
296
       
 
       


     

       
297
       
 
       
pub fn load() void {

     
···

       
302
       
 
       
    idtr.load();

     

       
303
       
 
       
}

     

       
304
       
 
       


     

       
305
       
+
       
pub fn add_handler(interrupt: Interrupt, comptime E: type, handler: InterruptHandler(E), dpl: u2, ist: u3) void {

     

       
306
       
 
       
    // Modify the type, dpl, and ist in place

     

       
307
       
 
       
    var tmp = interrupt_descriptor_table[interrupt.interrupt];

     

       
308
       
 
       
    tmp.options.dpl = dpl;

     

       
309
       
 
       
    tmp.options.ist_index = ist;

     

       
310
       
 
       
    interrupt_descriptor_table[interrupt.interrupt] = tmp;

     

       
311
       
 
       


     

       
312
       
+
       
    // Add the InterruptHandler

     

       
313
       
+
       
    defined_handlers[interrupt.interrupt] = @ptrCast(handler);

     

       
314
       
 
       
}

     

···

       
1
       
 
       
/// Remap the 8259 PIC to an interrupt base of 0x32

     

       
2
       
 
       
const arch = @import("../root.zig");

     

       
0
       
 
       

     

       
3
       
 
       
const std = @import("std");

     

       
4
       
 
       
const log = std.log.scoped(.pic);

     

       
5
       
 
       
const out = arch.port.out;

     
···

       
52
       
 
       
    wait();

     

       
53
       
 
       


     

       
54
       
 
       
    // Set up a spurious IRQ7 handler

     

       
55
       
-
       
    arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, spurious_handler, 3, 0);

     

       
56
       
 
       
}

     

       
57
       
 
       


     

       
58
       
 
       
inline fn wait() void {

     
···

       
64
       
 
       
    out(u8, PIC_ONE_CMD_PORT, CMD_EOI);

     

       
65
       
 
       
}

     

       
66
       
 
       


     

       
67
       
-
       
pub fn spurious_handler(_: *arch.interrupts.idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
68
       
 
       
    std.log.warn("Got a spurious IRQ7 (8259)", .{});

     

       
69
       
 
       
}

     

···

       
1
       
 
       
/// Remap the 8259 PIC to an interrupt base of 0x32

     

       
2
       
 
       
const arch = @import("../root.zig");

     

       
3
       
+
       
const idt = arch.interrupts.idt;

     

       
4
       
 
       
const std = @import("std");

     

       
5
       
 
       
const log = std.log.scoped(.pic);

     

       
6
       
 
       
const out = arch.port.out;

     
···

       
53
       
 
       
    wait();

     

       
54
       
 
       


     

       
55
       
 
       
    // Set up a spurious IRQ7 handler

     

       
56
       
+
       
    arch.interrupts.idt.add_handler(.{ .interrupt = 32 + 7 }, u64, spurious_handler, 0, 0);

     

       
57
       
 
       
}

     

       
58
       
 
       


     

       
59
       
 
       
inline fn wait() void {

     
···

       
65
       
 
       
    out(u8, PIC_ONE_CMD_PORT, CMD_EOI);

     

       
66
       
 
       
}

     

       
67
       
 
       


     

       
68
       
+
       
pub fn spurious_handler(_: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
69
       
 
       
    std.log.warn("Got a spurious IRQ7 (8259)", .{});

     

       
70
       
 
       
}

     

···

       
3
       
 
       
pub const pit = @import("pit.zig");

     

       
4
       
 
       
pub const idt = @import("idt.zig");

     

       
5
       
 
       
const std = @import("std");

     

       
0
       
 
       

     

       
6
       
 
       
const arch = @import("../root.zig");

     

       
0
       
 
       

     

       
7
       
 
       


     

       
8
       
 
       
pub inline fn enable() void {

     

       
9
       
 
       
    asm volatile ("sti");

     
···

       
12
       
 
       
    asm volatile ("cli");

     

       
13
       
 
       
}

     

       
14
       
 
       


     

       
15
       
-
       
pub fn unhandled_interrupt(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
16
       
-
       
    std.log.err("Unhandled interrupt (0x{x})!!! rip = 0x{x}", .{ stack_frame.int_num.interrupt, stack_frame.rip });

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
17
       
 
       
    arch.instructions.die();

     

       
18
       
 
       
}

     

       
19
       
 
       


     

       
20
       
-
       
pub fn breakpoint(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
21
       
 
       
    std.log.warn("Breakpoint @ 0x{x}, returning execution...", .{stack_frame.rip});

     

       
22
       
 
       
}

     

       
23
       
 
       


     

       
24
       
-
       
pub fn double_fault(stack_frame: *idt.InterruptFrame(u64)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
25
       
 
       
    std.log.err("Double fault @ 0x{x}, dying!!!", .{stack_frame.rip});

     

       
0
       
 
       

     

       
0
       
 
       

     

       
26
       
 
       
    arch.instructions.die();

     

       
27
       
 
       
}

     

       
28
       
 
       


     

       
29
       
-
       
pub fn general_protection_fault(stack_frame: *idt.InterruptFrame(idt.SelectorErrorCode)) callconv(.{ .x86_64_sysv = .{} }) void {

     

       
30
       
-
       
    std.log.warn("General Protection Fault @ 0x{x} (Error Code {}), returning execution...", .{ stack_frame.rip, stack_frame.error_code });

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
31
       
 
       
    arch.instructions.die();

     

       
32
       
 
       
}

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

       
0
       
 
       

     

···

       
3
       
 
       
pub const pit = @import("pit.zig");

     

       
4
       
 
       
pub const idt = @import("idt.zig");

     

       
5
       
 
       
const std = @import("std");

     

       
6
       
+
       
const log = std.log.scoped(.interrupts);

     

       
7
       
 
       
const arch = @import("../root.zig");

     

       
8
       
+
       
const common = @import("common");

     

       
9
       
 
       


     

       
10
       
 
       
pub inline fn enable() void {

     

       
11
       
 
       
    asm volatile ("sti");

     
···

       
14
       
 
       
    asm volatile ("cli");

     

       
15
       
 
       
}

     

       
16
       
 
       


     

       
17
       
+
       
const syscall_entry = @extern(*anyopaque, .{

     

       
18
       
+
       
    .name = "syscall_entry",

     

       
19
       
+
       
});

     

       
20
       
+
       


     

       
21
       
+
       
export fn syscall_handler(rdi: usize, rsi: usize) callconv(.c) void {

     

       
22
       
+
       
    std.log.info("Got a syscall! rdi=0x{x}, rsi=0x{x}", .{ rdi, rsi });

     

       
23
       
+
       
}

     

       
24
       
+
       


     

       
25
       
+
       
pub fn init_syscalls() void {

     

       
26
       
+
       
    // Set up the STAR MSR with the segment descriptors

     

       
27
       
+
       
    const IA32_STAR = arch.registers.MSR(u64, 0xC0000081);

     

       
28
       
+
       
    const star_value: u64 = 0 | @as(u64, arch.structures.gdt.StandardGdt.selectors.kernel_code) << 32 | (@as(u64, arch.structures.gdt.StandardGdt.selectors.tss_desc + 8) | 3) << 48;

     

       
29
       
+
       
    IA32_STAR.write(star_value);

     

       
30
       
+
       


     

       
31
       
+
       
    // Set up the EFER MSR with SCE (System Call Enable)

     

       
32
       
+
       
    const IA32_EFER = arch.registers.MSR(u64, 0xC0000080);

     

       
33
       
+
       
    const efer_val = IA32_EFER.read() | 0b1;

     

       
34
       
+
       
    IA32_EFER.write(efer_val);

     

       
35
       
+
       


     

       
36
       
+
       
    // Set up LSTAR with the syscall handler and FMASK to clear interrupts

     

       
37
       
+
       
    const IA32_LSTAR = arch.registers.MSR(u64, 0xC0000082);

     

       
38
       
+
       
    IA32_LSTAR.write(@intFromPtr(syscall_entry));

     

       
39
       
+
       


     

       
40
       
+
       
    const IA32_FMASK = arch.registers.MSR(u64, 0xC0000084);

     

       
41
       
+
       
    IA32_FMASK.write(1 << 9);

     

       
42
       
+
       
}

     

       
43
       
+
       


     

       
44
       
+
       
pub fn print_regs(frame: *idt.InterruptFrame(u64)) void {

     

       
45
       
+
       
    std.log.err("CR3: 0x{x:0>16}", .{frame.cr3});

     

       
46
       
+
       
    std.log.err("RAX: 0x{x:0>16}, RBX: 0x{x:0>16}, RCX: 0x{x:0>16}, RDX: 0x{x:0>16}", .{ frame.regs.rax, frame.regs.rbx, frame.regs.rcx, frame.regs.rdx });

     

       
47
       
+
       
    std.log.err("RSI: 0x{x:0>16}, RDI: 0x{x:0>16}, RBP: 0x{x:0>16}, RSP: 0x{x:0>16}", .{ frame.regs.rsi, frame.regs.rdi, frame.regs.rbp, frame.rsp });

     

       
48
       
+
       
    std.log.err("R8:  0x{x:0>16}, R9:  0x{x:0>16}, R10: 0x{x:0>16}, R11: 0x{x:0>16}", .{ frame.regs.r8, frame.regs.r9, frame.regs.r10, frame.regs.r11 });

     

       
49
       
+
       
    std.log.err("R12: 0x{x:0>16}, R13: 0x{x:0>16}, R14: 0x{x:0>16}, R15: 0x{x:0>16}", .{ frame.regs.r12, frame.regs.r13, frame.regs.r14, frame.regs.r15 });

     

       
50
       
+
       
    std.log.err("RFL: 0x{x:0>16}, RIP: 0x{x:0>16}, CS:  0x{x:0>16}, SS:  0x{x:0>16}", .{ frame.eflags, frame.rip, frame.cs, frame.ss });

     

       
51
       
+
       
}

     

       
52
       
+
       


     

       
53
       
+
       
pub fn unhandled_interrupt(frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
54
       
+
       
    if (std.enums.tagName(idt.Exception, frame.int_num.exception)) |exception_name| {

     

       
55
       
+
       
        std.log.err("Unhandled interrupt (0x{x} : {s})!!!", .{ frame.int_num.interrupt, exception_name });

     

       
56
       
+
       
    } else {

     

       
57
       
+
       
        std.log.err("Unhandled interrupt (0x{x})!!!", .{frame.int_num.interrupt});

     

       
58
       
+
       
    }

     

       
59
       
+
       


     

       
60
       
+
       
    print_regs(frame);

     

       
61
       
+
       


     

       
62
       
+
       
    arch.interrupts.disable();

     

       
63
       
 
       
    arch.instructions.die();

     

       
64
       
 
       
}

     

       
65
       
 
       


     

       
66
       
+
       
pub fn breakpoint(stack_frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
67
       
 
       
    std.log.warn("Breakpoint @ 0x{x}, returning execution...", .{stack_frame.rip});

     

       
68
       
 
       
}

     

       
69
       
 
       


     

       
70
       
+
       
pub fn double_fault(stack_frame: *idt.InterruptFrame(u64)) callconv(idt.CallConv) void {

     

       
71
       
 
       
    std.log.err("Double fault @ 0x{x}, dying!!!", .{stack_frame.rip});

     

       
72
       
+
       
    print_regs(stack_frame);

     

       
73
       
+
       
    arch.interrupts.disable();

     

       
74
       
 
       
    arch.instructions.die();

     

       
75
       
 
       
}

     

       
76
       
 
       


     

       
77
       
+
       
pub fn general_protection_fault(stack_frame: *idt.InterruptFrame(idt.SelectorErrorCode)) callconv(idt.CallConv) void {

     

       
78
       
+
       
    arch.interrupts.disable();

     

       
79
       
+
       
    std.log.warn("General Protection Fault @ 0x{x}", .{stack_frame.rip});

     

       
80
       
+
       


     

       
81
       
+
       
    const target = stack_frame.error_code.parse();

     

       
82
       
+
       
    switch (target) {

     

       
83
       
+
       
        .interrupt => |int| {

     

       
84
       
+
       
            if (std.enums.tagName(idt.Exception, int.exception)) |exc_name| {

     

       
85
       
+
       
                std.log.warn("Caused by interrupt 0x{x} ({s})", .{ int.interrupt, exc_name });

     

       
86
       
+
       
            } else {

     

       
87
       
+
       
                std.log.warn("Caused by interrupt 0x{x}", .{int.interrupt});

     

       
88
       
+
       
            }

     

       
89
       
+
       
        },

     

       
90
       
+
       
        .gdt_sel => |gdt_sel| {

     

       
91
       
+
       
            std.log.warn("GDT selector: 0x{x}", .{gdt_sel});

     

       
92
       
+
       
        },

     

       
93
       
+
       
        .ldt_sel => |ldt_sel| {

     

       
94
       
+
       
            std.log.warn("LDT selector: 0x{x}", .{ldt_sel});

     

       
95
       
+
       
        },

     

       
96
       
+
       
    }

     

       
97
       
+
       
    print_regs(stack_frame.normalize());

     

       
98
       
 
       
    arch.instructions.die();

     

       
99
       
 
       
}

     

       
100
       
+
       


     

       
101
       
+
       
// Start scheduling

     

       
102
       
+
       
pub fn startScheduling() noreturn {

     

       
103
       
+
       
    // 1. Pop off the task to run

     

       
104
       
+
       
    const task = common.scheduler.getNextTask() orelse {

     

       
105
       
+
       
        std.log.scoped(.startScheduling).err("No root task!", .{});

     

       
106
       
+
       
        @panic("startScheduling");

     

       
107
       
+
       
    };

     

       
108
       
+
       
    // 2. Apply the paging context

     

       
109
       
+
       
    task.getPagingContext().apply();

     

       
110
       
+
       
    // 3. Give a slice of 1000ms and fire away

     

       
111
       
+
       
    apic.armTimer(20);

     

       
112
       
+
       
    enter_userspace(task.rip, 0x69, task.rsp);

     

       
113
       
+
       
}

     

       
114
       
+
       


     

       
115
       
+
       
// Set up the IDT, PIC, TSC, and APIC

     

       
116
       
+
       
pub fn init() void {

     

       
117
       
+
       
    // Set up the IDT and associated vectors

     

       
118
       
+
       
    idt.init();

     

       
119
       
+
       
    idt.add_handler(.{ .exception = .breakpoint }, u64, arch.interrupts.breakpoint, 3, 0);

     

       
120
       
+
       
    idt.add_handler(.{ .exception = .double_fault }, u64, arch.interrupts.double_fault, 0, 0);

     

       
121
       
+
       
    idt.add_handler(.{ .exception = .general_protection_fault }, idt.SelectorErrorCode, arch.interrupts.general_protection_fault, 0, 0);

     

       
122
       
+
       
    idt.add_handler(.{ .exception = .page_fault }, u64, arch.mm.paging.page_fault_handler, 0, 0);

     

       
123
       
+
       
    // Set up the 8254's (we need 8259 timer to calibrate tsc)

     

       
124
       
+
       
    pic.init();

     

       
125
       
+
       
    // Calibrate the TSC against the 8259

     

       
126
       
+
       
    arch.tsc.calibrate_pit() catch |err| {

     

       
127
       
+
       
        log.err("Failed to calibrate TSC: {}", .{err});

     

       
128
       
+
       
    };

     

       
129
       
+
       
    // Set up everything needed to arm the timer

     

       
130
       
+
       
    apic.init.initialSetup();

     

       
131
       
+
       
}

     

       
132
       
+
       


     

       
133
       
+
       
// TODO: make this slightly less shit

     

       
134
       
+
       
pub fn enter_userspace(entry: u64, arg: u64, stack: u64) noreturn {

     

       
135
       
+
       
    log.info("usercode64 GDT 0x{x}, userdata64 GDT 0x{x}", .{ arch.structures.gdt.StandardGdt.selectors.user_code, arch.structures.gdt.StandardGdt.selectors.user_data });

     

       
136
       
+
       
    const cr3 = arch.registers.ControlRegisters.Cr3.read();

     

       
137
       
+
       
    arch.registers.ControlRegisters.Cr3.write(cr3);

     

       
138
       
+
       
    asm volatile (

     

       
139
       
+
       
        \\ push %[userdata64]

     

       
140
       
+
       
        \\ push %[stack]

     

       
141
       
+
       
        \\ push $0x202

     

       
142
       
+
       
        \\ push %[usercode64]

     

       
143
       
+
       
        \\ push %[entry]

     

       
144
       
+
       
        \\

     

       
145
       
+
       
        \\ mov %[userdata64], %%rax

     

       
146
       
+
       
        \\ mov %%rax, %%es

     

       
147
       
+
       
        \\ mov %%rax, %%ds

     

       
148
       
+
       
        \\

     

       
149
       
+
       
        \\ xor %%rsi, %%rsi

     

       
150
       
+
       
        \\ xor %%rax, %%rax

     

       
151
       
+
       
        \\ xor %%rdx, %%rdx

     

       
152
       
+
       
        \\ xor %%rcx, %%rcx

     

       
153
       
+
       
        \\ xor %%rbp, %%rbp

     

       
154
       
+
       
        \\ xor %%rbx, %%rbx

     

       
155
       
+
       
        \\

     

       
156
       
+
       
        \\ xor %%r8, %%r8

     

       
157
       
+
       
        \\ xor %%r9, %%r9

     

       
158
       
+
       
        \\ xor %%r10, %%r10

     

       
159
       
+
       
        \\ xor %%r11, %%r11

     

       
160
       
+
       
        \\ xor %%r12, %%r12

     

       
161
       
+
       
        \\ xor %%r13, %%r13

     

       
162
       
+
       
        \\ xor %%r14, %%r14

     

       
163
       
+
       
        \\ xor %%r15, %%r15

     

       
164
       
+
       
        \\

     

       
165
       
+
       
        \\ iretq

     

       
166
       
+
       
        \\

     

       
167
       
+
       
        :

     

       
168
       
+
       
        : [arg] "{rdi}" (arg),

     

       
169
       
+
       
          [stack] "r" (stack),

     

       
170
       
+
       
          [entry] "r" (entry),

     

       
171
       
+
       
          [userdata64] "i" (arch.structures.gdt.StandardGdt.selectors.user_data),

     

       
172
       
+
       
          [usercode64] "i" (arch.structures.gdt.StandardGdt.selectors.user_code),

     

       
173
       
+
       
    );

     

       
174
       
+
       
    unreachable;

     

       
175
       
+
       
}