commit 0e62c4b3e0c15a4522da2552614cbd17e4946a4b · pci.express/frostium

+6 -1

components/root_server/src/main.zig

···

       5
       5
        
           _ = os.syscall1(SYS_poke, 0xB16B00B5BADBABE);

     

       6
       6
        
           _ = os.syscall1(SYS_exit, 0x69696969);

     

       7
       7
        
       

     

       8
       8
       -
           unreachable;

     

       8
       8
       +
           die();

     

       9
       9
       +
       }

     

       10
       10
       +
       

     

       11
       11
       +
       pub inline fn die() noreturn {

     

       12
       12
       +
           while (true) {}

     

       9
       13
        
       }

     

       14
       14
       +
       

     

       10
       15
        
       pub const SYS_exit = 0x420;

     

       11
       16
        
       pub const SYS_poke = 0x69;

+1 -1

components/ukernel/arch/amd64/apic.zig components/ukernel/arch/amd64/interrupts/apic.zig

···

       1
       1
        
       const std = @import("std");

     

       2
       2
       -
       const arch = @import("root.zig");

     

       2
       2
       +
       const arch = @import("../root.zig");

     

       3
       3
        
       const log = std.log.scoped(.apic);

     

       4
       4
        
       

     

       5
       5
        
       // Must instantiate this!

+27 -22

components/ukernel/arch/amd64/boot.zig

···

       76
       76
        
           // Install the IDT

     

       77
       77
        
           initIdt();

     

       78
       78
        
       

     

       79
       79
       -
           // AP bootstrap

     

       80
       80
       -
           bootstrapAPs();

     

       81
       81
       -
       

     

       82
       79
        
           // Set up our own GDT and TSS

     

       83
       80
        
           const gdt = &arch.per_cpu_init_data.gdt_buf[0];

     

       84
       81
        
           gdt.* = .{};

     
···

       94
       91
        
           gdt.load();

     

       95
       92
        
           log.info("BSP successfully setup GDT+TSS!", .{});

     

       96
       93
        
       

     

       94
       94
       +
           // AP bootstrap

     

       95
       95
       +
           bootstrapAPs();

     

       96
       96
       +
       

     

       97
       97
       +
           // Calibrate our TSC

     

       98
       98
       +
           arch.tsc.calibrate();

     

       99
       99
       +
       

     

       97
       100
        
           log.info("Setting up scheduling...", .{});

     

       98
       98
       -
           // Initialize the APIC

     

       99
       99
       -
           // Map the APIC first!

     

       100
       100
       -
           const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       101
       101
       -
           common.mm.paging.mapPhys(.{

     

       102
       102
       -
               .vaddr = @intFromPtr(apic_base),

     

       103
       103
       -
               .paddr = 0xFEE0_0000,

     

       104
       104
       -
               .size = 0x1000,

     

       105
       105
       -
               .memory_type = .DeviceUncacheable,

     

       106
       106
       -
               .perms = .{

     

       107
       107
       -
                   .executable = false,

     

       108
       108
       -
                   .userspace_accessible = false,

     

       109
       109
       -
                   .writable = true,

     

       110
       110
       -
               },

     

       111
       111
       -
           }) catch @panic("apic bruh");

     

       112
       112
       -
           const apic: arch.apic.LAPIC = .{ .xapic = apic_base };

     

       113
       113
       -
           arch.apic.init.initialSetup(apic);

     

       101
       101
       +
           // // Initialize the APIC

     

       102
       102
       +
           // // Map the APIC first!

     

       103
       103
       +
           // const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       104
       104
       +
           // common.mm.paging.mapPhys(.{

     

       105
       105
       +
           //     .vaddr = @intFromPtr(apic_base),

     

       106
       106
       +
           //     .paddr = 0xFEE0_0000,

     

       107
       107
       +
           //     .size = 0x1000,

     

       108
       108
       +
           //     .memory_type = .DeviceUncacheable,

     

       109
       109
       +
           //     .perms = .{

     

       110
       110
       +
           //         .executable = false,

     

       111
       111
       +
           //         .userspace_accessible = false,

     

       112
       112
       +
           //         .writable = true,

     

       113
       113
       +
           //     },

     

       114
       114
       +
           // }) catch @panic("apic bruh");

     

       115
       115
       +
           // const apic: arch.interrupts.apic.LAPIC = .{ .xapic = apic_base };

     

       116
       116
       +
           // arch.interrupts.apic.init.initialSetup(apic);

     

       114
       117
        
       

     

       115
       118
        
           log.info("Allocating code for userspace...", .{});

     

       116
       119
        
       

     
···

       167
       170
        
       });

     

       168
       171
        
       export fn syscall_handler(rdi: usize, rsi: usize) callconv(.c) void {

     

       169
       172
        
           std.log.info("Got a syscall! rdi=0x{x}, rsi=0x{x}", .{ rdi, rsi });

     

       170
       170
       -
           if (rdi == 0x420) arch.instructions.die();

     

       171
       173
        
       }

     

       172
       174
        
       

     

       173
       175
        
       fn enter_userspace(entry: u64, arg: u64, stack: u64) noreturn {

     
···

       177
       179
        
           asm volatile (

     

       178
       180
        
               \\ push %[userdata64]

     

       179
       181
        
               \\ push %[stack]

     

       180
       180
       -
               \\ push $0x2

     

       182
       182
       +
               \\ push $0x202

     

       181
       183
        
               \\ push %[usercode64]

     

       182
       184
        
               \\ push %[entry]

     

       183
       185
        
               \\

     
···

       242
       244
        
           arch.per_cpu_init_data.idt.double_fault.installHandler(double_fault);

     

       243
       245
        
           arch.per_cpu_init_data.idt.general_protection_fault.installHandler(gpf);

     

       244
       246
        
           arch.per_cpu_init_data.idt.page_fault.installHandler(page_fault);

     

       245
       245
       -
           arch.per_cpu_init_data.idt.interrupts[0xFF - 32].installHandler(arch.apic.spurious_interrupt_handler);

     

       247
       247
       +
           arch.per_cpu_init_data.idt.interrupts[0xFF - 32].installHandler(arch.interrupts.apic.spurious_interrupt_handler);

     

       248
       248
       +
       

     

       249
       249
       +
           // Install the PIT handler

     

       250
       250
       +
           arch.per_cpu_init_data.idt.interrupts[0].installHandler(arch.interrupts.pit.handler);

     

       246
       251
        
       

     

       247
       252
        
           // Load the Idt Register

     

       248
       253
        
           const reg: Idt.Idtr = .{ .addr = idt_addr, .limit = @sizeOf(Idt) - 1 };

-12

components/ukernel/arch/amd64/instructions/root.zig

···

       5
       5
        
               asm volatile ("hlt");

     

       6
       6
        
           }

     

       7
       7
        
       }

     

       8
       8
       -
       

     

       9
       9
       -
       pub inline fn rdtsc() u64 {

     

       10
       10
       -
           var low: u32 = undefined;

     

       11
       11
       -
           var high: u32 = undefined;

     

       12
       12
       -
       

     

       13
       13
       -
           asm volatile ("rdtsc"

     

       14
       14
       -
               : [low] "={eax}" (low),

     

       15
       15
       -
                 [high] "={eax}" (high),

     

       16
       16
       -
           );

     

       17
       17
       -
       

     

       18
       18
       -
           return (@as(u64, high) << 32) | @as(u64, low);

     

       19
       19
       -
       }

+60

components/ukernel/arch/amd64/interrupts/pic.zig

···

       1
       1
       +
       /// Remap the 8259 PIC to an interrupt base of 0x32

     

       2
       2
       +
       const arch = @import("../root.zig");

     

       3
       3
       +
       const out = arch.port.out;

     

       4
       4
       +
       const in = arch.port.in;

     

       5
       5
       +
       

     

       6
       6
       +
       const PIC_ONE_CMD_PORT = 0x20;

     

       7
       7
       +
       const PIC_ONE_DATA_PORT = 0x21;

     

       8
       8
       +
       const PIC_ONE_IDT_BASE = 32;

     

       9
       9
       +
       

     

       10
       10
       +
       const PIC_TWO_CMD_PORT = 0xA0;

     

       11
       11
       +
       const PIC_TWO_DATA_PORT = 0xA1;

     

       12
       12
       +
       const PIC_TWO_IDT_BASE = 40;

     

       13
       13
       +
       

     

       14
       14
       +
       const CMD_INIT = 0x11;

     

       15
       15
       +
       const CMD_EOI = 0x20;

     

       16
       16
       +
       

     

       17
       17
       +
       // Remap the sixteen 8259 interrupts out of the way to

     

       18
       18
       +
       // base interrupt number 32, and mask all interrupts

     

       19
       19
       +
       // except the 8254 PIT

     

       20
       20
       +
       pub fn init() void {

     

       21
       21
       +
           // Init the 8259's

     

       22
       22
       +
           out(u8, PIC_ONE_CMD_PORT, CMD_INIT);

     

       23
       23
       +
           wait();

     

       24
       24
       +
           out(u8, PIC_TWO_CMD_PORT, CMD_INIT);

     

       25
       25
       +
           wait();

     

       26
       26
       +
       

     

       27
       27
       +
           // Write the interrupt base numbers for both

     

       28
       28
       +
           out(u8, PIC_ONE_DATA_PORT, PIC_ONE_IDT_BASE);

     

       29
       29
       +
           wait();

     

       30
       30
       +
           out(u8, PIC_TWO_DATA_PORT, PIC_TWO_IDT_BASE);

     

       31
       31
       +
           wait();

     

       32
       32
       +
       

     

       33
       33
       +
           // Tell first 8259 that there's a second 8259 at IRQ 2, and tell

     

       34
       34
       +
           // the second 8259 that it is at that position.

     

       35
       35
       +
           out(u8, PIC_ONE_DATA_PORT, 1 << 2);

     

       36
       36
       +
           wait();

     

       37
       37
       +
           out(u8, PIC_TWO_DATA_PORT, 2);

     

       38
       38
       +
           wait();

     

       39
       39
       +
       

     

       40
       40
       +
           // Tell the PICs to use 8086 mode

     

       41
       41
       +
           out(u8, PIC_ONE_DATA_PORT, 1);

     

       42
       42
       +
           wait();

     

       43
       43
       +
           out(u8, PIC_ONE_DATA_PORT, 1);

     

       44
       44
       +
           wait();

     

       45
       45
       +
       

     

       46
       46
       +
           // Unmask only the 8254

     

       47
       47
       +
           out(u8, PIC_ONE_DATA_PORT, 0b1111_1110);

     

       48
       48
       +
           wait();

     

       49
       49
       +
           out(u8, PIC_TWO_DATA_PORT, 0b1111_1111);

     

       50
       50
       +
           wait();

     

       51
       51
       +
       }

     

       52
       52
       +
       

     

       53
       53
       +
       inline fn wait() void {

     

       54
       54
       +
           out(u8, 0x80, 0);

     

       55
       55
       +
       }

     

       56
       56
       +
       

     

       57
       57
       +
       // Notify the first 8259 that we're done with the timer interrupt

     

       58
       58
       +
       pub fn end_of_timer_interrupt() void {

     

       59
       59
       +
           out(u8, PIC_ONE_CMD_PORT, CMD_EOI);

     

       60
       60
       +
       }

+25

components/ukernel/arch/amd64/interrupts/pit.zig

···

       1
       1
       +
       const arch = @import("../root.zig");

     

       2
       2
       +
       const out = arch.port.out;

     

       3
       3
       +
       const pic = @import("pic.zig");

     

       4
       4
       +
       const Idt = arch.structures.Idt;

     

       5
       5
       +
       const PIT_HZ = 1_193_180;

     

       6
       6
       +
       const DATA_PORT = 0x40;

     

       7
       7
       +
       const CMD_PORT = 0x43;

     

       8
       8
       +
       

     

       9
       9
       +
       pub fn set_frequency(hz: u32) void {

     

       10
       10
       +
           const divider = PIT_HZ / hz;

     

       11
       11
       +
           @import("std").log.debug("divider = {}", .{divider});

     

       12
       12
       +
           // Square Wave Generator, lobyte/hibyte

     

       13
       13
       +
           const mode = 0b0011_0110;

     

       14
       14
       +
       

     

       15
       15
       +
           out(u8, CMD_PORT, mode);

     

       16
       16
       +
           out(u8, DATA_PORT, @truncate(divider));

     

       17
       17
       +
           out(u8, DATA_PORT, @truncate(divider >> 8));

     

       18
       18
       +
       }

     

       19
       19
       +
       var ctr: usize = 0;

     

       20
       20
       +
       pub fn handler(_: *Idt.InterruptStackFrame) callconv(.{ .x86_64_interrupt = .{} }) void {

     

       21
       21
       +
           if (ctr % 1000 == 0)

     

       22
       22
       +
               @import("std").log.warn("PIT!", .{});

     

       23
       23
       +
           ctr += 1;

     

       24
       24
       +
           pic.end_of_timer_interrupt();

     

       25
       25
       +
       }

+10

components/ukernel/arch/amd64/interrupts/root.zig

···

       1
       1
       +
       pub const apic = @import("apic.zig");

     

       2
       2
       +
       pub const pic = @import("pic.zig");

     

       3
       3
       +
       pub const pit = @import("pit.zig");

     

       4
       4
       +
       

     

       5
       5
       +
       pub inline fn enable() void {

     

       6
       6
       +
           asm volatile ("sti");

     

       7
       7
       +
       }

     

       8
       8
       +
       pub inline fn disable() void {

     

       9
       9
       +
           asm volatile ("cli");

     

       10
       10
       +
       }

+62

components/ukernel/arch/amd64/port.zig

···

       1
       1
       +
       pub fn out(comptime T: type, port: u16, value: T) void {

     

       2
       2
       +
           switch (T) {

     

       3
       3
       +
               u8 => outb(port, value),

     

       4
       4
       +
               u16 => outw(port, value),

     

       5
       5
       +
               u32 => outl(port, value),

     

       6
       6
       +
               else => @compileError("Bad I/O port out size!"),

     

       7
       7
       +
           }

     

       8
       8
       +
       }

     

       9
       9
       +
       

     

       10
       10
       +
       pub fn in(comptime T: type, port: u16) T {

     

       11
       11
       +
           return switch (T) {

     

       12
       12
       +
               u8 => inb(port),

     

       13
       13
       +
               u16 => inw(port),

     

       14
       14
       +
               u32 => inl(port),

     

       15
       15
       +
               else => @compileError("Bad I/O port in size!"),

     

       16
       16
       +
           };

     

       17
       17
       +
       }

     

       18
       18
       +
       

     

       19
       19
       +
       pub fn outb(port: u16, val: u8) void {

     

       20
       20
       +
           asm volatile ("outb %[val], %[port]"

     

       21
       21
       +
               :

     

       22
       22
       +
               : [val] "{al}" (val),

     

       23
       23
       +
                 [port] "N{dx}" (port),

     

       24
       24
       +
           );

     

       25
       25
       +
       }

     

       26
       26
       +
       

     

       27
       27
       +
       pub fn outw(port: u16, val: u16) void {

     

       28
       28
       +
           asm volatile ("outw %[val], %[port]"

     

       29
       29
       +
               :

     

       30
       30
       +
               : [val] "{ax}" (val),

     

       31
       31
       +
                 [port] "N{dx}" (port),

     

       32
       32
       +
           );

     

       33
       33
       +
       }

     

       34
       34
       +
       

     

       35
       35
       +
       pub fn outl(port: u16, val: u32) void {

     

       36
       36
       +
           asm volatile ("outl %[val], %[port]"

     

       37
       37
       +
               :

     

       38
       38
       +
               : [val] "{eax}" (val),

     

       39
       39
       +
                 [port] "N{dx}" (port),

     

       40
       40
       +
           );

     

       41
       41
       +
       }

     

       42
       42
       +
       

     

       43
       43
       +
       pub fn inb(port: u16) u8 {

     

       44
       44
       +
           return asm volatile ("inb %[port], %[result]"

     

       45
       45
       +
               : [result] "={al}" (-> u8),

     

       46
       46
       +
               : [port] "N{dx}" (port),

     

       47
       47
       +
           );

     

       48
       48
       +
       }

     

       49
       49
       +
       

     

       50
       50
       +
       fn inw(port: u16) u16 {

     

       51
       51
       +
           return asm volatile ("inw %[port], %[result]"

     

       52
       52
       +
               : [result] "={ax}" (-> u16),

     

       53
       53
       +
               : [port] "N{dx}" (port),

     

       54
       54
       +
           );

     

       55
       55
       +
       }

     

       56
       56
       +
       

     

       57
       57
       +
       pub fn inl(port: u16) u32 {

     

       58
       58
       +
           return asm volatile ("inl %[port], %[result]"

     

       59
       59
       +
               : [result] "={eax}" (-> u32),

     

       60
       60
       +
               : [port] "N{dx}" (port),

     

       61
       61
       +
           );

     

       62
       62
       +
       }

+2 -1

components/ukernel/arch/amd64/root.zig

···

       1
       1
       -
       pub const apic = @import("apic.zig");

     

       2
       1
        
       pub const boot = @import("boot.zig");

     

       3
       2
        
       pub const instructions = @import("instructions/root.zig");

     

       3
       3
       +
       pub const interrupts = @import("interrupts/root.zig");

     

       4
       4
        
       pub const mm = @import("mm/root.zig");

     

       5
       5
        
       pub const port = @import("port.zig");

     

       6
       6
        
       pub const structures = @import("structures/root.zig");

     

       7
       7
       +
       pub const tsc = @import("tsc.zig");

     

       7
       8
        
       pub const registers = @import("registers.zig");

     

       8
       9
        
       const common = @import("common");

     

       9
       10
        
       const std = @import("std");

+26

components/ukernel/arch/amd64/tsc.zig

···

       1
       1
       +
       const arch = @import("root.zig");

     

       2
       2
       +
       pub inline fn rdtsc() u64 {

     

       3
       3
       +
           var low: u32 = undefined;

     

       4
       4
       +
           var high: u32 = undefined;

     

       5
       5
       +
       

     

       6
       6
       +
           asm volatile ("rdtsc"

     

       7
       7
       +
               : [low] "={eax}" (low),

     

       8
       8
       +
                 [high] "={eax}" (high),

     

       9
       9
       +
           );

     

       10
       10
       +
       

     

       11
       11
       +
           return (@as(u64, high) << 32) | @as(u64, low);

     

       12
       12
       +
       }

     

       13
       13
       +
       

     

       14
       14
       +
       /// This should be called if we cannot get the TSC rate from

     

       15
       15
       +
       /// CPUID.15h and 16h on Intel platforms. The calibration will be done

     

       16
       16
       +
       /// against the 8254 PIT.

     

       17
       17
       +
       pub fn calibrate() void {

     

       18
       18
       +
           // Set up the PIC

     

       19
       19
       +
           arch.interrupts.pic.init();

     

       20
       20
       +
       

     

       21
       21
       +
           // Set up the PIT at 1 kHz

     

       22
       22
       +
           arch.interrupts.pit.set_frequency(1000);

     

       23
       23
       +
       

     

       24
       24
       +
           // Enable interrupts

     

       25
       25
       +
           // arch.interrupts.enable();

     

       26
       26
       +
       }