commit 495d11bf33dda14b599c60c01c6a64d974346682 · pci.express/frostium

+162

components/ukernel/arch/amd64/apic.zig

···

       1
       +
       const std = @import("std");

     

       2
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       const arch = @import("root.zig");

     

       3
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       const log = std.log.scoped(.apic);

     

       4
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       5
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       // Must instantiate this!

     

       6
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       pub const LAPIC = union(enum) {

     

       7
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           xapic: [*]volatile u8,

     

       8
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           x2apic,

     

       9
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       10
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           const Self = @This();

     

       11
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       12
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           // ID Register

     

       13
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       14
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           pub const IdRegister = packed struct(u32) {

     

       15
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               _reserved0: u24 = 0,

     

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               id: u8,

     

       17
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           };

     

       18
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       19
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           pub fn getIdRegister(lapic: Self) IdRegister {

     

       20
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               return @bitCast(lapic.getRegister(.lapic_id));

     

       21
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           }

     

       22
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       23
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           // Version Register

     

       24
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           pub const VersionRegister = packed struct(u32) {

     

       25
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               version: u8,

     

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               _reserved0: u8 = 0,

     

       27
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               max_lvt_entry: u8,

     

       28
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               support_for_eoi_broadcast_suppression: bool,

     

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               _reserved1: u7 = 0,

     

       30
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           };

     

       31
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       32
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           pub fn getVersionRegister(lapic: Self) VersionRegister {

     

       33
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               return @bitCast(lapic.getRegister(.version));

     

       34
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           }

     

       35
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       36
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           // Spurious Interrupt

     

       37
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           pub const SpuriousInterruptRegister = packed struct(u32) {

     

       38
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               idt_entry: u8,

     

       39
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               apic_soft_enable: bool,

     

       40
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               focus_processor_checking: bool = false,

     

       41
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               _reserved0: u2 = 0,

     

       42
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               eoi_broadcast_suppression: bool = false,

     

       43
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               _reserved1: u19 = 0,

     

       44
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           };

     

       45
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       46
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           pub fn getSpuriousInterruptRegister(lapic: Self) VersionRegister {

     

       47
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               return @bitCast(lapic.getRegister(.spurious_vector));

     

       48
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           }

     

       49
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       50
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           pub fn setSpuriousInterruptRegister(lapic: Self, val: SpuriousInterruptRegister) void {

     

       51
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               lapic.setRegister(.spurious_vector, @bitCast(val));

     

       52
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           }

     

       53
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       54
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           pub fn getRegister(lapic: Self, reg: Register) u32 {

     

       55
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               switch (lapic) {

     

       56
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                   .xapic => |base| {

     

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                       const ptr: *align(0x10) volatile u32 = @ptrCast(@alignCast(base + reg.xapic()));

     

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                       return ptr.*;

     

       59
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                   },

     

       60
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                   .x2apic => {

     

       61
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                       return arch.registers.readMSR(u32, reg.x2apic());

     

       62
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                   },

     

       63
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               }

     

       64
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           }

     

       65
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       66
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           pub fn setRegister(lapic: Self, reg: Register, value: u32) void {

     

       67
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               switch (lapic) {

     

       68
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                   .xapic => |base| {

     

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                       const ptr: *align(0x10) volatile u32 = @ptrCast(@alignCast(base + reg.xapic()));

     

       70
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                       ptr.* = value;

     

       71
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                   },

     

       72
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                   .x2apic => {

     

       73
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                       arch.registers.writeMSR(u32, reg.x2apic(), value);

     

       74
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                   },

     

       75
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               }

     

       76
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           }

     

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           pub const Register = enum(u32) {

     

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               // From Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3

     

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               lapic_id = 0x2,

     

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               version = 0x3,

     

       82
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               task_priority = 0x8,

     

       83
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               process_priority = 0xa,

     

       84
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               eoi = 0xb,

     

       85
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               logical_destination = 0xd,

     

       86
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               spurious_vector = 0xf,

     

       87
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       88
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               in_service_0_31 = 0x10,

     

       89
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               in_service_63_32 = 0x11,

     

       90
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               in_service_95_64 = 0x12,

     

       91
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               in_service_127_96 = 0x13,

     

       92
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               in_service_159_128 = 0x14,

     

       93
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               in_service_191_160 = 0x15,

     

       94
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               in_service_223_192 = 0x16,

     

       95
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               in_service_255_224 = 0x17,

     

       96
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       97
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               trigger_mode_0_31 = 0x18,

     

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               trigger_mode_63_32 = 0x19,

     

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               trigger_mode_95_64 = 0x1a,

     

       100
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               trigger_mode_127_96 = 0x1b,

     

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               trigger_mode_159_128 = 0x1c,

     

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               trigger_mode_191_160 = 0x1d,

     

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               trigger_mode_223_192 = 0x1e,

     

       104
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               trigger_mode_255_224 = 0x1f,

     

       105
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       106
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               interrupt_request_0_31 = 0x20,

     

       107
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               interrupt_request_63_32 = 0x21,

     

       108
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               interrupt_request_95_64 = 0x22,

     

       109
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               interrupt_request_127_96 = 0x23,

     

       110
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               interrupt_request_159_128 = 0x24,

     

       111
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               interrupt_request_191_160 = 0x25,

     

       112
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               interrupt_request_223_192 = 0x26,

     

       113
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               interrupt_request_255_224 = 0x27,

     

       114
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       115
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               error_status = 0x28,

     

       116
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               lvt_cmi = 0x2f,

     

       117
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       118
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               interrupt_command_0_31 = 0x30,

     

       119
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               interrupt_command_32_63 = 0x31,

     

       120
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               lvt_timer = 0x32,

     

       121
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               lvt_thermal_sensor = 0x33,

     

       122
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               lvt_performance_monitoring = 0x34,

     

       123
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               lvt_lint0 = 0x35,

     

       124
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               lvt_lint1 = 0x36,

     

       125
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               lvt_error = 0x37,

     

       126
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               initial_count = 0x38,

     

       127
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               current_count = 0x39,

     

       128
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               divide_configuration = 0x3e,

     

       129
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               self_ipi = 0x3f,

     

       130
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       131
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               const Self = @This();

     

       132
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       133
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               // Get an offset to apply to the xAPIC base

     

       134
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               pub fn xapic(reg: Register) usize {

     

       135
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                   return @intFromEnum(reg) * 0x10;

     

       136
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               }

     

       137
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       138
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               // Get an MSR number to write to

     

       139
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               pub fn x2apic(reg: Register) u32 {

     

       140
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                   return 0x800 | @intFromEnum(reg);

     

       141
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               }

     

       142
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           };

     

       143
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       };

     

       144
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       145
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       pub const init = struct {

     

       146
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           // Get the APIC ready (call first)

     

       147
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           pub fn initialSetup(lapic: LAPIC) void {

     

       148
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               lapic.setSpuriousInterruptRegister(.{

     

       149
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                   .apic_soft_enable = true,

     

       150
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                   .idt_entry = 0xFF,

     

       151
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               });

     

       152
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               var lol = arch.instructions.cpuid.cpuid(0x15, 0x00);

     

       153
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               lol = arch.instructions.cpuid.cpuid(0x40000010, 0x00);

     

       154
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           }

     

       155
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       156
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           // Calibrate the APIC timer

     

       157
       +
       

     

       158
       +
       };

     

       159
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       160
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       pub fn spurious_interrupt_handler(_: *arch.structures.Idt.InterruptStackFrame) callconv(.{ .x86_64_interrupt = .{} }) void {

     

       161
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           log.warn("Got a spurious interrupt!", .{});

     

       162
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       }

+31 -47

components/ukernel/arch/amd64/boot.zig

···

       8
        
       const StandardGdt = arch.structures.gdt.StandardGdt;

     

       9
        
       const Tss = arch.structures.tss.Tss;

     

       10
        
       

     

       11
       -
       var per_cpu_init_data: PerCpuInitData = .{};

     

       12
       -
       

     

       13
        
       pub const limine_requests = struct {

     

       14
        
           export var start_marker: limine.RequestsStartMarker linksection(".limine_reqs_start") = .{};

     

       15
        
           export var end_marker: limine.RequestsEndMarker linksection(".limine_reqs_end") = .{};

     
···

       73
        
           }

     

       74
        
       

     

       75
        
           // Initialize per-cpu data (GDT and TSS)

     

       76
       -
           per_cpu_init_data.init();

     

       77
        
       

     

       78
        
           // Install the IDT

     

       79
        
           initIdt();

     
···

       82
        
           bootstrapAPs();

     

       83
        
       

     

       84
        
           // Set up our own GDT and TSS

     

       85
       -
           const gdt = &per_cpu_init_data.gdt_buf[0];

     

       86
        
           gdt.* = .{};

     

       87
       -
           const tss = &per_cpu_init_data.tss_buf[0];

     

       88
        
           // TSS rsp 0x3800

     

       89
        
           tss.* = .{

     

       90
        
               .rsp0 = 0x3800,

     
···

       95
        
           gdt.tss_desc.set_tss_addr(tss);

     

       96
        
           gdt.load();

     

       97
        
           log.info("BSP successfully setup GDT+TSS!", .{});

     

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       98
        
       

     

       99
        
           log.info("Allocating code for userspace...", .{});

     

       100
        
       

     
···

       219
        
       }

     

       220
        
       

     

       221
        
       pub fn initIdt() void {

     

       222
       -
           const idt_addr: usize = @intFromPtr(per_cpu_init_data.idt);

     

       223
        
       

     

       224
        
           // Install the known exception handlers

     

       225
       -
           per_cpu_init_data.idt.breakpoint.installHandler(breakpoint_handler);

     

       226
       -
           per_cpu_init_data.idt.double_fault.installHandler(double_fault);

     

       227
       -
           per_cpu_init_data.idt.general_protection_fault.installHandler(gpf);

     

       228
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           per_cpu_init_data.idt.page_fault.installHandler(page_fault);

     

       0
        
       
     

       229
        
       

     

       230
        
           // Load the Idt Register

     

       231
        
           const reg: Idt.Idtr = .{ .addr = idt_addr, .limit = @sizeOf(Idt) - 1 };

     
···

       234
        
       

     

       235
        
       // TODO: update the type reflection thing to make a custom

     

       236
        
       // function type for the ISR

     

       237
       -
       pub const PageFaultErrorCode = packed struct {

     

       238
        
           present: bool,

     

       239
        
           write: bool,

     

       240
        
           user: bool,

     
···

       288
        
       

     

       289
        
       fn ap_init(mp_info: *limine.SmpMpFeature.MpInfo) callconv(.c) noreturn {

     

       290
        
           // Set up the IDT

     

       291
       -
           const idt_addr: usize = @intFromPtr(per_cpu_init_data.idt);

     

       292
        
           const reg: Idt.Idtr = .{ .addr = idt_addr, .limit = @sizeOf(Idt) - 1 };

     

       293
        
           reg.load();

     

       294
        
       

     

       295
        
           // Set up our GDT and TSS

     

       296
       -
           const gdt = &per_cpu_init_data.gdt_buf[mp_info.processor_id];

     

       297
        
           gdt.* = .{};

     

       298
       -
           const tss = &per_cpu_init_data.tss_buf[mp_info.processor_id];

     

       299
        
           tss.* = .{};

     

       300
        
       

     

       301
        
           gdt.tss_desc.set_tss_addr(tss);

     
···

       305
        
       

     

       306
        
           arch.instructions.die();

     

       307
        
       }

     

       308
       -
       

     

       309
       -
       const PerCpuInitData = struct {

     

       310
       -
           gdt_buf: []StandardGdt = undefined,

     

       311
       -
           tss_buf: []Tss = undefined,

     

       312
       -
           idt: *Idt = undefined,

     

       313
       -
       

     

       314
       -
           const Self = @This();

     

       315
       -
           pub fn init(self: *Self) void {

     

       316
       -
               // 1. Allocate an IDT

     

       317
       -
               const idt_addr = common.init_data.bootmem.allocMem(@sizeOf(Idt)) catch |err| {

     

       318
       -
                   std.log.err("init PerCpuInitData: IDT alloc failed: {}", .{err});

     

       319
       -
                   @panic("rip bozo");

     

       320
       -
               };

     

       321
       -
               self.idt = @ptrFromInt(idt_addr);

     

       322
       -
       

     

       323
       -
               // 2. Allocate space for GDT and TSS data

     

       324
       -
               const cpu_count = limine_requests.mp.response.?.cpu_count;

     

       325
       -
               const gdt_size = @sizeOf(StandardGdt);

     

       326
       -
               const tss_size = @sizeOf(Tss);

     

       327
       -
       

     

       328
       -
               const total_required_size = gdt_size * cpu_count + tss_size * cpu_count;

     

       329
       -
               const buf: [*]u8 = @ptrFromInt(common.init_data.bootmem.allocMem(total_required_size) catch |err| {

     

       330
       -
                   std.log.err("init PerCpuInitData: GDT/TSS alloc failed: {}", .{err});

     

       331
       -
                   @panic("rip bozo");

     

       332
       -
               });

     

       333
       -
       

     

       334
       -
               // 3. Transmute and fill out the structure

     

       335
       -
               const gdt_buf: [*]StandardGdt = @ptrCast(@alignCast(buf[0 .. gdt_size * cpu_count]));

     

       336
       -
               const tss_buf: [*]Tss = @ptrCast(@alignCast(buf[gdt_size * cpu_count ..][0 .. tss_size * cpu_count]));

     

       337
       -
               self.gdt_buf = gdt_buf[0..cpu_count];

     

       338
       -
               self.tss_buf = tss_buf[0..cpu_count];

     

       339
       -
           }

     

       340
       -
       };

···

       8
        
       const StandardGdt = arch.structures.gdt.StandardGdt;

     

       9
        
       const Tss = arch.structures.tss.Tss;

     

       10
        
       

     

       0
        
       
     

       0
        
       
     

       11
        
       pub const limine_requests = struct {

     

       12
        
           export var start_marker: limine.RequestsStartMarker linksection(".limine_reqs_start") = .{};

     

       13
        
           export var end_marker: limine.RequestsEndMarker linksection(".limine_reqs_end") = .{};

     
···

       71
        
           }

     

       72
        
       

     

       73
        
           // Initialize per-cpu data (GDT and TSS)

     

       74
       +
           arch.per_cpu_init_data.init(limine_requests.mp.response.?.cpu_count);

     

       75
        
       

     

       76
        
           // Install the IDT

     

       77
        
           initIdt();

     
···

       80
        
           bootstrapAPs();

     

       81
        
       

     

       82
        
           // Set up our own GDT and TSS

     

       83
       +
           const gdt = &arch.per_cpu_init_data.gdt_buf[0];

     

       84
        
           gdt.* = .{};

     

       85
       +
           const tss = &arch.per_cpu_init_data.tss_buf[0];

     

       86
        
           // TSS rsp 0x3800

     

       87
        
           tss.* = .{

     

       88
        
               .rsp0 = 0x3800,

     
···

       93
        
           gdt.tss_desc.set_tss_addr(tss);

     

       94
        
           gdt.load();

     

       95
        
           log.info("BSP successfully setup GDT+TSS!", .{});

     

       96
       +
       

     

       97
       +
           log.info("Setting up scheduling...", .{});

     

       98
       +
           // Initialize the APIC

     

       99
       +
           // Map the APIC first!

     

       100
       +
           const apic_base = common.mm.physToHHDM([*]volatile u8, 0xFEE0_0000);

     

       101
       +
           common.mm.paging.mapPhys(.{

     

       102
       +
               .vaddr = @intFromPtr(apic_base),

     

       103
       +
               .paddr = 0xFEE0_0000,

     

       104
       +
               .size = 0x1000,

     

       105
       +
               .memory_type = .DeviceUncacheable,

     

       106
       +
               .perms = .{

     

       107
       +
                   .executable = false,

     

       108
       +
                   .userspace_accessible = false,

     

       109
       +
                   .writable = true,

     

       110
       +
               },

     

       111
       +
           }) catch @panic("apic bruh");

     

       112
       +
           const apic: arch.apic.LAPIC = .{ .xapic = apic_base };

     

       113
       +
           arch.apic.init.initialSetup(apic);

     

       114
        
       

     

       115
        
           log.info("Allocating code for userspace...", .{});

     

       116
        
       

     
···

       235
        
       }

     

       236
        
       

     

       237
        
       pub fn initIdt() void {

     

       238
       +
           const idt_addr: usize = @intFromPtr(arch.per_cpu_init_data.idt);

     

       239
        
       

     

       240
        
           // Install the known exception handlers

     

       241
       +
           arch.per_cpu_init_data.idt.breakpoint.installHandler(breakpoint_handler);

     

       242
       +
           arch.per_cpu_init_data.idt.double_fault.installHandler(double_fault);

     

       243
       +
           arch.per_cpu_init_data.idt.general_protection_fault.installHandler(gpf);

     

       244
       +
           arch.per_cpu_init_data.idt.page_fault.installHandler(page_fault);

     

       245
       +
           arch.per_cpu_init_data.idt.interrupts[0xFF - 32].installHandler(arch.apic.spurious_interrupt_handler);

     

       246
        
       

     

       247
        
           // Load the Idt Register

     

       248
        
           const reg: Idt.Idtr = .{ .addr = idt_addr, .limit = @sizeOf(Idt) - 1 };

     
···

       251
        
       

     

       252
        
       // TODO: update the type reflection thing to make a custom

     

       253
        
       // function type for the ISR

     

       254
       +
       pub const PageFaultErrorCode = packed struct(u64) {

     

       255
        
           present: bool,

     

       256
        
           write: bool,

     

       257
        
           user: bool,

     
···

       305
        
       

     

       306
        
       fn ap_init(mp_info: *limine.SmpMpFeature.MpInfo) callconv(.c) noreturn {

     

       307
        
           // Set up the IDT

     

       308
       +
           const idt_addr: usize = @intFromPtr(arch.per_cpu_init_data.idt);

     

       309
        
           const reg: Idt.Idtr = .{ .addr = idt_addr, .limit = @sizeOf(Idt) - 1 };

     

       310
        
           reg.load();

     

       311
        
       

     

       312
        
           // Set up our GDT and TSS

     

       313
       +
           const gdt = &arch.per_cpu_init_data.gdt_buf[mp_info.processor_id];

     

       314
        
           gdt.* = .{};

     

       315
       +
           const tss = &arch.per_cpu_init_data.tss_buf[mp_info.processor_id];

     

       316
        
           tss.* = .{};

     

       317
        
       

     

       318
        
           gdt.tss_desc.set_tss_addr(tss);

     
···

       322
        
       

     

       323
        
           arch.instructions.die();

     

       324
        
       }

     

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       0
        
       
     

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       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0

-5

components/ukernel/arch/amd64/instructions.zig

···

       1
       -
       pub inline fn die() noreturn {

     

       2
       -
           while (true) {

     

       3
       -
               asm volatile ("hlt");

     

       4
       -
           }

     

       5
       -
       }

+30

components/ukernel/arch/amd64/instructions/cpuid.zig

···

       1
       +
       pub inline fn cpuid(leaf: u32, sub: u32) DefaultResults {

     

       2
       +
           var eax: u32 = undefined;

     

       3
       +
           var ebx: u32 = undefined;

     

       4
       +
           var edx: u32 = undefined;

     

       5
       +
           var ecx: u32 = undefined;

     

       6
       +
       

     

       7
       +
           asm volatile (

     

       8
       +
               \\cpuid

     

       9
       +
               : [eax] "={eax}" (eax),

     

       10
       +
                 [ebx] "={ebx}" (ebx),

     

       11
       +
                 [edx] "={edx}" (edx),

     

       12
       +
                 [ecx] "={ecx}" (ecx),

     

       13
       +
               : [leaf] "{eax}" (leaf),

     

       14
       +
                 [sub] "{ecx}" (sub),

     

       15
       +
           );

     

       16
       +
       

     

       17
       +
           return .{

     

       18
       +
               .eax = eax,

     

       19
       +
               .ebx = ebx,

     

       20
       +
               .ecx = ecx,

     

       21
       +
               .edx = edx,

     

       22
       +
           };

     

       23
       +
       }

     

       24
       +
       

     

       25
       +
       pub const DefaultResults = struct {

     

       26
       +
           eax: u32 = 0,

     

       27
       +
           ebx: u32 = 0,

     

       28
       +
           edx: u32 = 0,

     

       29
       +
           ecx: u32 = 0,

     

       30
       +
       };

+19

components/ukernel/arch/amd64/instructions/root.zig

···

       1
       +
       pub const cpuid = @import("cpuid.zig");

     

       2
       +
       

     

       3
       +
       pub inline fn die() noreturn {

     

       4
       +
           while (true) {

     

       5
       +
               asm volatile ("hlt");

     

       6
       +
           }

     

       7
       +
       }

     

       8
       +
       

     

       9
       +
       pub inline fn rdtsc() u64 {

     

       10
       +
           var low: u32 = undefined;

     

       11
       +
           var high: u32 = undefined;

     

       12
       +
       

     

       13
       +
           asm volatile ("rdtsc"

     

       14
       +
               : [low] "={eax}" (low),

     

       15
       +
                 [high] "={eax}" (high),

     

       16
       +
           );

     

       17
       +
       

     

       18
       +
           return (@as(u64, high) << 32) | @as(u64, low);

     

       19
       +
       }

+1 -1

components/ukernel/arch/amd64/mm/paging.zig

···

       15
        
       pub const PageTable = extern struct {

     

       16
        
           entries: [512]Entry,

     

       17
        
       

     

       18
       -
           pub const Entry = packed struct {

     

       19
        
               present: bool,

     

       20
        
               writable: bool,

     

       21
        
               user_accessible: bool,

···

       15
        
       pub const PageTable = extern struct {

     

       16
        
           entries: [512]Entry,

     

       17
        
       

     

       18
       +
           pub const Entry = packed struct(u64) {

     

       19
        
               present: bool,

     

       20
        
               writable: bool,

     

       21
        
               user_accessible: bool,

+46 -38

components/ukernel/arch/amd64/registers.zig

···

       32
        
           };

     

       33
        
       }

     

       34
        
       

     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       35
        
       pub fn MSR(comptime T: type, comptime num: u32) type {

     

       36
        
           return struct {

     

       37
        
               pub fn read() T {

     

       38
       -
                   // TODO: switch on bit size to allow custom structs

     

       39
       -
                   switch (T) {

     

       40
       -
                       u32 => return asm volatile ("rdmsr"

     

       41
       -
                           : [_] "={eax}" (-> u32),

     

       42
       -
                           : [_] "{ecx}" (num),

     

       43
       -
                       ),

     

       44
       -
                       u64 => {

     

       45
       -
                           var low_val: u32 = undefined;

     

       46
       -
                           var high_val: u32 = undefined;

     

       47
       -
                           asm volatile ("rdmsr"

     

       48
       -
                               : [_] "={eax}" (low_val),

     

       49
       -
                                 [_] "={edx}" (high_val),

     

       50
       -
                               : [_] "{ecx}" (num),

     

       51
       -
                           );

     

       52
       -
                           return (@as(u64, high_val) << 32) | @as(u64, low_val);

     

       53
       -
                       },

     

       54
       -
                       else => @compileError("Unimplemented for type"),

     

       55
       -
                   }

     

       56
        
               }

     

       57
       -
               pub fn write(value: T) void {

     

       58
       -
                   switch (T) {

     

       59
       -
                       u32 => asm volatile ("wrmsr"

     

       60
       -
                           :

     

       61
       -
                           : [_] "{eax}" (value),

     

       62
       -
                             [_] "{edx}" (@as(u32, 0)),

     

       63
       -
                             [_] "{ecx}" (num),

     

       64
       -
                       ),

     

       65
       -
                       u64 => {

     

       66
       -
                           const low_val: u32 = @truncate(value);

     

       67
       -
                           const high_val: u32 = @truncate(value >> 32);

     

       68
       -
                           asm volatile ("wrmsr"

     

       69
       -
                               :

     

       70
       -
                               : [_] "{eax}" (low_val),

     

       71
       -
                                 [_] "{edx}" (high_val),

     

       72
       -
                                 [_] "{ecx}" (num),

     

       73
       -
                           );

     

       74
       -
                       },

     

       75
       -
                       else => @compileError("Unimplemented for type"),

     

       76
       -
                   }

     

       77
        
               }

     

       78
        
           };

     

       79
        
       }

···

       32
        
           };

     

       33
        
       }

     

       34
        
       

     

       35
       +
       pub inline fn readMSR(comptime T: type, num: u32) T {

     

       36
       +
           return switch (@bitSizeOf(T)) {

     

       37
       +
               32 => @bitCast(asm volatile ("rdmsr"

     

       38
       +
                   : [_] "={eax}" (-> u32),

     

       39
       +
                   : [_] "{ecx}" (num),

     

       40
       +
               )),

     

       41
       +
               64 => blk: {

     

       42
       +
                   var low_val: u32 = undefined;

     

       43
       +
                   var high_val: u32 = undefined;

     

       44
       +
                   asm volatile ("rdmsr"

     

       45
       +
                       : [_] "={eax}" (low_val),

     

       46
       +
                         [_] "={edx}" (high_val),

     

       47
       +
                       : [_] "{ecx}" (num),

     

       48
       +
                   );

     

       49
       +
                   const combined_val = (@as(u64, high_val) << 32) | @as(u64, low_val);

     

       50
       +
                   break :blk @as(T, combined_val);

     

       51
       +
               },

     

       52
       +
               else => @compileError("Unimplemented for type of this size"),

     

       53
       +
           };

     

       54
       +
       }

     

       55
       +
       

     

       56
       +
       pub inline fn writeMSR(comptime T: type, num: u32, val: T) void {

     

       57
       +
           switch (@bitSizeOf(T)) {

     

       58
       +
               32 => asm volatile ("wrmsr"

     

       59
       +
                   :

     

       60
       +
                   : [_] "{eax}" (val),

     

       61
       +
                     [_] "{edx}" (@as(u32, 0)),

     

       62
       +
                     [_] "{ecx}" (num),

     

       63
       +
               ),

     

       64
       +
               64 => {

     

       65
       +
                   const low_val: u32 = @truncate(@as(u64, val));

     

       66
       +
                   const high_val: u32 = @truncate(@as(u64, val >> 32));

     

       67
       +
                   asm volatile ("wrmsr"

     

       68
       +
                       :

     

       69
       +
                       : [_] "{eax}" (low_val),

     

       70
       +
                         [_] "{edx}" (high_val),

     

       71
       +
                         [_] "{ecx}" (num),

     

       72
       +
                   );

     

       73
       +
               },

     

       74
       +
               else => @compileError("Unimplemented for type of this size"),

     

       75
       +
           }

     

       76
       +
       }

     

       77
       +
       

     

       78
        
       pub fn MSR(comptime T: type, comptime num: u32) type {

     

       79
        
           return struct {

     

       80
        
               pub fn read() T {

     

       81
       +
                   return readMSR(T, num);

     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       82
        
               }

     

       83
       +
               pub fn write(val: T) void {

     

       84
       +
                   writeMSR(T, num, val);

     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       85
        
               }

     

       86
        
           };

     

       87
        
       }

+41 -1

components/ukernel/arch/amd64/root.zig

···

       0
        
       
     

       1
        
       pub const boot = @import("boot.zig");

     

       2
       -
       pub const instructions = @import("instructions.zig");

     

       3
        
       pub const mm = @import("mm/root.zig");

     

       0
        
       
     

       4
        
       pub const structures = @import("structures/root.zig");

     

       5
        
       pub const registers = @import("registers.zig");

     

       6
        
       const common = @import("common");

     
···

       17
        
           .queryPageSize = pageSize,

     

       18
        
       };

     

       19
        
       pub const panic = std.debug.FullPanic(common.aux.panic);

     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       0
        
       
     

       20
        
       

     

       21
        
       comptime {

     

       22
        
           // Entry point (_start)

···

       1
       +
       pub const apic = @import("apic.zig");

     

       2
        
       pub const boot = @import("boot.zig");

     

       3
       +
       pub const instructions = @import("instructions/root.zig");

     

       4
        
       pub const mm = @import("mm/root.zig");

     

       5
       +
       pub const port = @import("port.zig");

     

       6
        
       pub const structures = @import("structures/root.zig");

     

       7
        
       pub const registers = @import("registers.zig");

     

       8
        
       const common = @import("common");

     
···

       19
        
           .queryPageSize = pageSize,

     

       20
        
       };

     

       21
        
       pub const panic = std.debug.FullPanic(common.aux.panic);

     

       22
       +
       

     

       23
       +
       pub var per_cpu_init_data: PerCpuInitData = .{};

     

       24
       +
       

     

       25
       +
       const PerCpuInitData = struct {

     

       26
       +
           const StandardGdt = structures.gdt.StandardGdt;

     

       27
       +
           const Tss = structures.tss.Tss;

     

       28
       +
           const Idt = structures.Idt;

     

       29
       +
       

     

       30
       +
           gdt_buf: []StandardGdt = undefined,

     

       31
       +
           tss_buf: []Tss = undefined,

     

       32
       +
           idt: *Idt = undefined,

     

       33
       +
       

     

       34
       +
           const Self = @This();

     

       35
       +
           pub fn init(self: *Self, cpu_count: u64) void {

     

       36
       +
               // 1. Allocate an IDT

     

       37
       +
               const idt_addr = common.init_data.bootmem.allocMem(@sizeOf(Idt)) catch |err| {

     

       38
       +
                   std.log.err("init PerCpuInitData: IDT alloc failed: {}", .{err});

     

       39
       +
                   @panic("rip bozo");

     

       40
       +
               };

     

       41
       +
               self.idt = @ptrFromInt(idt_addr);

     

       42
       +
       

     

       43
       +
               // 2. Allocate space for GDT and TSS data

     

       44
       +
               const gdt_size = @sizeOf(StandardGdt);

     

       45
       +
               const tss_size = @sizeOf(Tss);

     

       46
       +
       

     

       47
       +
               const total_required_size = gdt_size * cpu_count + tss_size * cpu_count;

     

       48
       +
               const buf: [*]u8 = @ptrFromInt(common.init_data.bootmem.allocMem(total_required_size) catch |err| {

     

       49
       +
                   std.log.err("init PerCpuInitData: GDT/TSS alloc failed: {}", .{err});

     

       50
       +
                   @panic("rip bozo");

     

       51
       +
               });

     

       52
       +
       

     

       53
       +
               // 3. Transmute and fill out the structure

     

       54
       +
               const gdt_buf: [*]StandardGdt = @ptrCast(@alignCast(buf[0 .. gdt_size * cpu_count]));

     

       55
       +
               const tss_buf: [*]Tss = @ptrCast(@alignCast(buf[gdt_size * cpu_count ..][0 .. tss_size * cpu_count]));

     

       56
       +
               self.gdt_buf = gdt_buf[0..cpu_count];

     

       57
       +
               self.tss_buf = tss_buf[0..cpu_count];

     

       58
       +
           }

     

       59
       +
       };

     

       60
        
       

     

       61
        
       comptime {

     

       62
        
           // Entry point (_start)

+2 -2

components/ukernel/arch/amd64/structures/Idt.zig

···

       105
        
       

     

       106
        
               const FuncType = @Type(FunctionTypeInfo);

     

       107
        
       

     

       108
       -
               pub const Options = packed struct {

     

       109
        
                   /// Interrupt Stack Table Index

     

       110
        
                   ist_index: u3,

     

       111
        
                   _reserved: u5 = 0,

     
···

       144
        
       }

     

       145
        
       

     

       146
        
       /// IDT Register

     

       147
       -
       pub const Idtr = packed struct {

     

       148
        
           limit: u16,

     

       149
        
           addr: u64,

     

       150

···

       105
        
       

     

       106
        
               const FuncType = @Type(FunctionTypeInfo);

     

       107
        
       

     

       108
       +
               pub const Options = packed struct(u16) {

     

       109
        
                   /// Interrupt Stack Table Index

     

       110
        
                   ist_index: u3,

     

       111
        
                   _reserved: u5 = 0,

     
···

       144
        
       }

     

       145
        
       

     

       146
        
       /// IDT Register

     

       147
       +
       pub const Idtr = packed struct(u80) {

     

       148
        
           limit: u16,

     

       149
        
           addr: u64,

     

       150

+5 -5

components/ukernel/arch/amd64/structures/gdt.zig

···

       2
        
       const std = @import("std");

     

       3
        
       const arch = @import("../root.zig");

     

       4
        
       

     

       5
       -
       pub const Descriptor = packed struct {

     

       6
        
           limit_low: u16 = 0,

     

       7
        
           base_low: u16 = 0,

     

       8
        
           base_mid: u8 = 0,

     
···

       13
        
       

     

       14
        
           const Self = @This();

     

       15
        
       

     

       16
       -
           pub const Access = packed struct {

     

       17
        
               // Accessed

     

       18
        
               accessed: bool = true,

     

       19
        
               // Readable/Writable

     
···

       35
        
               };

     

       36
        
           };

     

       37
        
       

     

       38
       -
           pub const Flags = packed struct {

     

       39
        
               // Reserved

     

       40
        
               _reserved: u1 = 0,

     

       41
        
               // Long Mode code flag

     
···

       121
        
           }

     

       122
        
       };

     

       123
        
       

     

       124
       -
       pub const Gdtr = packed struct {

     

       125
        
           limit: u16,

     

       126
        
           base: u64,

     

       127
        
       

     
···

       134
        
       };

     

       135
        
       

     

       136
        
       const TssDescriptor = extern struct {

     

       137
       -
           const Low = packed struct {

     

       138
        
               limit_low: u16 = 0,

     

       139
        
               base_low: u16 = 0,

     

       140
        
               base_mid: u8 = 0,

···

       2
        
       const std = @import("std");

     

       3
        
       const arch = @import("../root.zig");

     

       4
        
       

     

       5
       +
       pub const Descriptor = packed struct(u64) {

     

       6
        
           limit_low: u16 = 0,

     

       7
        
           base_low: u16 = 0,

     

       8
        
           base_mid: u8 = 0,

     
···

       13
        
       

     

       14
        
           const Self = @This();

     

       15
        
       

     

       16
       +
           pub const Access = packed struct(u8) {

     

       17
        
               // Accessed

     

       18
        
               accessed: bool = true,

     

       19
        
               // Readable/Writable

     
···

       35
        
               };

     

       36
        
           };

     

       37
        
       

     

       38
       +
           pub const Flags = packed struct(u4) {

     

       39
        
               // Reserved

     

       40
        
               _reserved: u1 = 0,

     

       41
        
               // Long Mode code flag

     
···

       121
        
           }

     

       122
        
       };

     

       123
        
       

     

       124
       +
       pub const Gdtr = packed struct(u80) {

     

       125
        
           limit: u16,

     

       126
        
           base: u64,

     

       127
        
       

     
···

       134
        
       };

     

       135
        
       

     

       136
        
       const TssDescriptor = extern struct {

     

       137
       +
           const Low = packed struct(u64) {

     

       138
        
               limit_low: u16 = 0,

     

       139
        
               base_low: u16 = 0,

     

       140
        
               base_mid: u8 = 0,